Tandy 102 Service Manual page 96

Functional Pin Description
RESET (Input)
A high level input to this pin resets the chip, placing all three I/O ports in the input mode, and stops
timer.
ALE (Input)
Negative going edge of the ALE (Address Latch Enable) input latches ADo - 7, IO/M, and CE signals
into the respective latches.
ADo - 7 (Input/Output)
Three- state , bi-directional address/data bus. Eight-bit address information on this bus is read into
the internal address latch at the negative-going edge of the ALE. Eight bits of data can be read
from or written to the chip using this bus, depending on the state of the WRITE or READ input.
CE (Input)
When the CE input is high, both read and write operations to the chip are disabled.
IO/M (Input)
A high level input to this pin selects the internal I/O functions. A low level selects the memory.
RD (input)
If this pin is low, data from either the memory or ports is read onto the ADo - 7 lines, depending on
the state of the IO/M line.
WR (Input)
If this pin is low, data on lines ADo - 7 is written into either the memory or into the selected port,
depending on the state of the IO/M line.
PAo -. 7, PBo - 7 (input/Output)
General-purpose I/O pins. Input/output directions can be determined by programming the com-
mand/status
(C/S)
register.
PCo - 5 (Input/Output)
Three pins are usable either as general-purpose I/O pins or control pins for the PA and PB ports.
When used as control pins, they are assigned to the following functions:
PCO:
A INTR (port A interrupt)
PC1 : A BF (port A full)
PC2:
A STB (port A strobe)
PC3:
B INTR (port B interrupt)
PC4:
B BF (port B buffer full)
PC5 : B STB (port B strobe)
TIMER IN (Input)
Input to the counter/timer
TIMER OUT (Output)
Timer output. When the present count is reached during timer operation, this pin provides a
square-wave or pulse output, depending on the programmed control status.
C-8