Tandy 102 Service Manual page 22

Address Decoding and Bank Selection Circuit
Although four 8 KB static RAMs and two masked ROMs can be installed in the Tandy 102, six
chip-select signals are required.
Because the RAMs are positioned from 8000H to FFFFH, and ROMs are positioned from OOOOH to
7FFFH, address signal Al 5 selects the ROMs or RAMs at M5. At another section of M15, address
signals Al 4 and A13 select each RAM corresponding to the memory map. The ROMs (both
standard and optional) installed in the Tandy 102 are the 32 KB 1-chip type. As shown in the
memory map, the address space is positioned from OOOOH to 7FFFH.
The chip select signals are generated by the A15 and STROM signals. The ADO is latched at M14
by the WR signal and Y6 signal, and then the STROM signal is generated.
The standard ROM is selected by the low level STROM signal and the optional ROM is selected by
the high level STROM signal.
M5
TO
4
Y1 5
Y2 6
M5
0000-7FFFH
Standard ROM
0000-7FFFH
Option ROM
8000-9FFFH
ADO
4 D
Q 2 STROM 2 A
7
Y6 10
8
M14
3
Y3
9 26 9 C 8
WR*
RDXE
A15
A13
A14
5 6
4 17
1 11 10
TO
12 Option RAM
13
37
37
85
G
9
Y1 11
12 0 11 A0#
A000-BFFFH
RAM # 3
0000-DFFFH
Y2 10
RAM #2
14 A
13
Y3
9
8
E000-FFFFH
RAM
#1
Figure 4-5. Address Decoding and Bank Selection Circuit