I/O Map - Tandy 102 Service Manual

I/O MAP
As shown in the figure below, the I/O address decoding circuit, consisting of M16, decodes address
signals A12 to Al 5 and generates I/O selection signals YO to Y7.
The application of the selection signals (YO to Y7) for the I/O devices are shown in Table 4-1.
Table 4-2 shows the port address of the PIO.
16
6 15
10f
G1
14
YO
1
M16
NC
3 4 13
A15
M17
G 2A Y2
5
12
2
G2B
Y3
40H138
1I
Y4
3
10
A 14
C Y5
2 9
A13
B Y6
7
A 12
A
Y7
8
Figure 4-6. I/O Address Decoding Circuit
Address Signal Active Level Application
Free area for an optional unit and other select sig-
OOH - 7FH -
nals of various circuits made by user.
80 - 8FH YO L Device-select signal for optional I/O controller unit.
Enable signal for relay RY3 in MODEM connector
90H - 9FH Y2 L
interface circuit.
BOH - BFH Y3 L PIO (81 C55) chip-select signal.
COH - CFH Y4 L
Enable signal for data input/output port of UART.
Enable signal to set various modes and read port
DOH - DFH Y5 L
of UART.
Enable signal for STROM and REMOTE, and input
EOH - EFH Y6 L data from keyboard.
Strobe signal for printer and clock.
FOH - FFH Y7
L
Enable signal for LCD driver LSI.
Table 4-1. I/O Map
Address
BOH or B8H
B1 H or B9H
82H or BAH
B3H or BBH
B4H or BCH
B5H or BDH
B6H, B7H, B8H and B9H
Port or Register
Command/status register (internal)
Port A
Port B
Port C
Timer register lower byte
Timer register upper byte
Not used
Table 4-2. Port Address of PIO
4-5