Tandy 102 Service Manual page 102

Functional Pin Description
RRD (Input)
A high level on RECEIVER REGISTER DISABLE forces the receiver holding outputs
RBR1 -RBR8
to a
high impedance state.
RBR1-8 (Output)
The contents of the RECEIVER BUFFER REGISTER appear on these three-state outputs. Word
formats less than 8 characters are right justified to RBR1.
PE (Output)
A high level on PARITY ERROR indicates received parity does not match parity programmed by
control bits. When parity is inhibited, this output is low.
FE (Output)
A high level on FRAMING ERROR indicates the first stop bit was invalid.
OE (Output)
A high level on OVERRUN ERROR indicates the data received flag was not cleared before the last
character was transferred to the received buffer register.
SFD (Input)
A high level on STATUS FLAGS DISABLE forces the outputs PE, FE, OE, DR, TBRE to a high
impedance state.
RRC (Input)
The RECEIVER REGISTER CLOCK is 16X the receiver data rate.
DRR (Input)
A low level on DATA RECEIVED RESET clears the data received output DR to a low level.
DR (Output)
EA high level on DATA RECEIVED indicates a character has been received and transferred to the
receiver buffer register.
RRI (Input)
Serial data on RECEIVER REGISTER INPUT is clocked into the receiver register.
MR (Input)
A high level on MASTER RESET clears PE, FE, OE, and DR to a low level and sets the transmitter
output to a high level after 18 clock cycles. MR does not clear the receiver buffer register. This
input must be pulsed at least once after power up.
TBRE (Output)
A high level on TRANSMITTER BUFFER REGISTER EMPTY indicates the transmitter buffer register
has transferred its data to the transmitter register and is ready for new data.
TBRL (Input)
A low level on TRANSMITTER BUFFER REGISTER LOAD transfers data from inputs TBRE1 -8 into
the transmitter buffer register. A low to high transition on TBRL indicates data transfer to the
transmitter register is busy, transfer is automatically delayed so that the two characters are
transmitted end to end.
THE (Output)
A high level on TRANSMITTER REGISTER EMPTY indicates completed transmission of a character
including stop bits.
TRO (Output)
Character data , start and stop bits appear serially at the TRANSMTTER REGISTER OUTPUT.
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