Yamaha RIO3224-D Service Manual page 30

Rio3224-D
88E6350R (YD688A00) GIGABIT ETHERNET SWITCHING HUB
PIN
NAME I/O
NO.
1 C3_LED I/O
I/O
2 P0_MDIN[3]
P0_MDIP[3] I/O
3
P0_AVDD -
4
P0_MDIN[2] I/O
5
P0_MDIP[2] I/O
6
P0_MDIN[1] I/O
7
P0_MDIP[1] I/O
8
P0_AVDD -
9
P0_MDIN[0] I/O
10
P0_MDIP[0] I/O
11
P1_MDIN[3] I/O
12
P1_MDIP[3] I/O
13
P1_AVDD -
14
P1_MDIN[2] I/O
15
P1_MDIP[2] I/O
16
P1_MDIN[1] I/O
17
P1_MDIP[1] I/O
18
19 P1_AVDD -
20 P1_MDIN[0] I/O
I/O
21 P1_MDIP[0]
P2_MDIN[3] I/O
22
P2_MDIP[3] I/O
23
P2_AVDD -
24
P2_MDIN[2] I/O
25
P2_MDIP[2] I/O
26
P2_MDIN[1] I/O
27
P2_MDIP[1] I/O
28
P2_AVDD -
29
P2_MDIN[0] I/O
30
P2_MDIP[0] I/O
31
RESET -
32
AVDD -
33
NC -
34
NC -
35
XTAL_GND I
36
37 XTAL_IN I
38 XTAL_OUT O
-
39 AVDD
-
40 VDDO_CORE
-
41 VDDO_S
I/O
42 PTP_TRIG/S_VDDOS
VDDO_CORE -
43
P3_MDIN[3] I/O
44
P3_MDIP[3] I/O
45
P3_AVDD -
46
P3_MDIN[2] I/O
47
P3_MDIP[2] I/O
48
P3_MDIN[1] I/O
49
P3_MDIP[1] I/O
50
P3_AVDD -
51
P3_MDIN[0] I/O
52
P3_MDIP[0] I/O
53
P4_MDIN[3] I/O
54
P4_MDIP[3] I/O
55
56 P4_AVDD -
57 P4_MDIN[2] I/O
I/O
58 P4_MDIP[2]
I/O
59 P4_MDIN[1]
I/O
60 P4_MDIP[1]
-
61 P4_AVDD
P4_MDIN[0] I/O
62
P4_MDIP[0] I/O
63
NC -
64
NC -
65
30
FUNCTION
Column 3 for the LED
Media Dependent Interface [3]
Media Dependent Interface [3]
Power supply 1.8V
Media Dependent Interface [2]
Media Dependent Interface [2]
Media Dependent Interface [1]
Media Dependent Interface [1]
Power supply 1.8V
Media Dependent Interface [0]
Media Dependent Interface [0]
Media Dependent Interface [3]
Media Dependent Interface [3]
Power supply 1.8V
Media Dependent Interface [2]
Media Dependent Interface [2]
Media Dependent Interface [1]
Media Dependent Interface [1]
Power supply 1.8V
Media Dependent Interface [0]
Media Dependent Interface [0]
Media Dependent Interface [3]
Media Dependent Interface [3]
Power supply 1.8V
Media Dependent Interface [2]
Media Dependent Interface [2]
Media Dependent Interface [1]
Media Dependent Interface [1]
Power supply 1.8V
Media Dependent Interface [0]
Media Dependent Interface [0]
Resistor Current reference
Gigabit PHY 1.8V power supply
No Connect
No Connect
Analog Ground for the XTAL
25 MHz system reference clock input provided from the board
Syatem reference clock output provided to the board
Gigabit PHY 1.8V power supply
1.0V power supply to the digital core
3.3V power supply for I/O pins
Precise Timing Protocol Trigger Generate/VDDO_S 0=2.5V 1=3.3V
1.0V power supply to the digital core
Media Dependent Interface [3]
Media Dependent Interface [3]
Power supply 1.8V
Media Dependent Interface [2]
Media Dependent Interface [2]
Media Dependent Interface [1]
Media Dependent Interface [1]
Power supply 1.8V
Media Dependent Interface [0]
Media Dependent Interface [0]
Media Dependent Interface [3]
Media Dependent Interface [3]
Power supply 1.8V
Media Dependent Interface [2]
Media Dependent Interface [2]
Media Dependent Interface [1]
Media Dependent Interface [1]
Power supply 1.8V
Media Dependent Interface [0]
Media Dependent Interface [0]
No Connect
No Connect
PIN
NAME I/O
NO.
66 SW_MODE[1] I Switch Mode 00=Test mode 01=Reserved
10=Unmanaged/Forwarding mode 11=CPU Attached/Disable mode
SW_MODE[0] I Switch Mode 00=Test mode 01=Reserved
67
10=Unmanaged/Forwarding mode 11=CPU Attached/Disable mode
/RESET I Hardware reset
68
VDDO_CORE - 1.0V power supply to the digital core
69
MDC_CPU I Management Data Clock, Slave
70
MDIO_CPU I/O Management Data I/O, Slave
71
/INT - INTn is an active low, open drain pin
72
P5_RGMII_EN I Port5's GMII/RGMII/MII interface
73
enable(generically referred to as RGMII5)
VDDO_CORE - 1.0V power supply to the digital core
74
P5_VDDO - Power supply 3.3V
75
P5_OUTD[3] O Output Data
76
77 P5_OUTD[2] O Output Data
78 P5_OUTD[1] O Output Data
79 P5_OUTD[0] O Output Data
80 VDDO_CORE - 1.0V power supply to the digital core
81 P5_OUTEN/ O Output Enable
82 P5_GTXCLK O Transmit Clock
83 P5_OUTCLK I Output Clock
P5_VDDO - Power supply 3.3V
84
P5_INCLK I Input Clock
85
P5_INDV I Input Data Valid
86
VDDO_CORE - 1.0V power supply to the digital core
87
P5_IND[0] I Input Data
88
P5_IND[1] I Input Data
89
P5_IND[2] I Input Data
90
P5_IND[3] I Input Data
91
P5_VDDO - Power supply 3.3V
92
VDDO_CORE - 1.0V power supply to the digital core
93
P5_CRS I/O Carrier Sense
94
P5_COL I/O Collision
95
96 P6_RGMII_EN I Port6's GMII/RGMII/MII interface
enable(generically referred to as RGMII6)
97 VDDO_CORE - 1.0V power supply to the digital core
98 P6_VDDO - Power supply 3.3V
99 P6_OUTD[3] O Output Data
100 P6_OUTD[2] O Output Data
101 P6_OUTD[1] O Output Data
O Output Data
102 P6_OUTD[0]
VDDO_CORE - 1.0V power supply to the digital core
103
P6_OUTEN/ O Output Enable
104
P6_GTXCLK O Transmit Clock
105
P6_OUTCLK I Output Clock
106
P6_VDDO - Power supply 3.3V
107
P6_INCLK I Input Clock
108
P6_INDV I Input Data Valid
109
VDDO_CORE - 1.0V power supply to the digital core
110
P6_IND[0] I Input Data
111
P6_IND[1] I Input Data
112
P6_IND[2] I Input Data
113
114 P6_IND[3] I Input Data
115 P6_VDDO - Power supply 3.3V
116 VDDO_CORE - 1.0V power supply to the digital core
117 P6_CRS I/O Carrier Sense
118 P6_COL I/O Collision
119 P0_LED/JUMBO O Parallel multiplexed LED output/JumboMode register
O
120 P1_LED/LED_SEL[0] Parallel multiplexed LED output/
O
121 P2_LED/LED_SEL[1] Parallel multiplexed LED output/Link/Activity with Speed select
-
122 EE_VDDO Power supply 3.3V
O
123 P3_LED Parallel multiplexed LED output
P4_LED O Parallel multiplexed LED output
124
C0_LED O Column 0 for the LED
125
C1_LED O Column 1 for the LED
126
EE_VDDO - Power supply 3.3V
127
C2_LED O Column 2 for the LED
128
VSS - Ground to device
129
DNTSB: IC503
FUNCTION