Digilent Genesys 2 Reference Manual page 33

Signal Name FPGA Pin
ADC ()_SDATA AH19
DAC ()_SDATA AJ19
BCLK AG18
LRCLK AJ18
MCLK AK19
SDA AF18
SCL AE19
Table 19. Audio signal description.
reference
(https://reference.digilentinc.com/tag/reference?do=showtag&tag=reference)
(https://reference.digilentinc.com/tag/programmable-logic?do=showtag&tag=programmable-logic)
(https://reference.digilentinc.com/tag/genesys-2?do=showtag&tag=genesys-2)
manual?do=showtag&tag=reference-manual)
1) With the exception of CLK3_BIDIR
2) See the 7-Series FPGAs SelectIO Resources User Guide (
(http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf)
First Name
Last Name
Email Address
Pin Function
Serialized audio resulting from the analog-to-digital conversion (record).
Serialized audio is converted to analog by the codec (playback).
Serial data port clock.
Serial data port frame clock.
Master clock.
I2C configuration interface.
I2C configuration interface.
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ug471
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