Digilent Genesys 2 Reference Manual page 26

Quad Primitive
Table 12. Quad 115 pinout.
Quad Primitive
116 GTXE2_CHANNEL
IBUFDS_GTE2
Table 13. Quad 116 pinout.
Quad Primitive
117 GTXE2_ CHANNEL
Table 14. Quad 117 pinout.
16. MicroSD Slot
The Genesys 2 provides a microSD slot for both FPGA configuration and user access. The on-board Auxiliary Function
microcontroller shares the SD card bus with the FPGA. Before the FPGA is configured the microcontroller must have access
to the SD card via an SPI interface. Once a bit file is downloaded to the FPGA (from any source), the microcontroller powers
off the SD slot and relinquishes control of the bus. The FPGA design will find the SD card in an unpowered state.
Pin type
MGTXTXP/N3
MGTXRXP/N3
Pin type
X0Y4 MGTXTXP/N0
MGTXRXP/N0
X0Y5 MGTXTXP/N1
MGTXRXP/N1
X0Y6 MGTXTXP/N2
MGTXRXP/N2
X0Y7 MGTXTXP/N3
MGTXRXP/N3
X0Y2 MGTREFCLKP/N0
X0Y3 MGTREFCLKP/N1
Pin type
X0Y8 MGTXTXP/N0
MGTXRXP/N0
X0Y9 MGTXTXP/N1
MGTXRXP/N1
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Pin FMC signal
T2/T1 DP3_C2M_P/N
V6/V5 DP3_M2C_P/N
Pin FMC signal
P2/P1 DP4_C2M_P/N
T6/T5 DP4_M2C_P/N
N4/N3 DP5_C2M_P/N
R4/R3 DP5_M2C_P/N
M2/M1 DP6_C2M_P/N
P6/P5 DP6_M2C_P/N
L4/L3 DP7_C2M_P/N
M6/M5 DP7_M2C_P/N
L8/L7 GBTCLK0_P/N
N8/N7 GBTCLK1_P/N
Pin FMC signal
K2/K1 DP8_C2M_P/N
K6/K5 DP8_M2C_P/N
J4/J3 DP9_C2M_P/N
H6/H5 DP9_M2C_P/N