Usb Hid Host - Digilent Genesys 2 Reference Manual

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by the USB controller that is input to the FPGA. In asynchronous mode data transfer is happening on transitions of read and
write control signals. The USB controller emulates a FIFO memory, providing status signals about the availability of data to be
read or free space for data to be written. The FPGA controls data transfer by read, write and output enable signals.
Direction
Signal
(FPGA)
Description
D[7:0]
I/O
Data bus.
RXF#
Input
When low, data is available for reading from the FIFO.
TXE#
Input
When low, data can be written to the FIFO.
RD#
Output
A low-pulse triggers data to be read out from the FIFO.
WR#
Output
A low-pulse triggers data to be written to the FIFO.
SIWU#
Input
Send immediate or Wake-up function. In normal mode a low pulse triggers sending a data
packet with the data currently in the FIFO, even if below the normal packet size. In suspend
mode a low pulse can wake up the Host PC.
OE#
Output
When low, the data bus is driven by the USB controller (read transfer). When high, the bus is
driven by the FPGA (write transfer).
CLKO
Input
60 MHz () clock used in synchronous mode. Data is launched and can be captured on the rising
edge.
Table 6. DPTI signal description.
For more information, see the
10.2. Serial Peripheral Interface (DSPI)
An industry-standard SPI interface can also be used for transferring data. It uses only four signals for serial full-duplex
communication. The USB controller acts as a SPI master, with the FPGA taking the slave role. The USB controller initiates a
transaction after API () function calls and transfers data in both directions simultaneously.
Signal
Direction (FPGA)
SCK
Input
MOSI ()
Output
MISO ()
Input
SS
Input
Table 7. DSPI signal description.
For more information, see the

11. USB HID Host

FT2232H datasheet
(http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf)
Description
Data bus.
When low, data is available for reading from the FIFO.
When low, data can be written to the FIFO.
A low-pulse triggers data to be read out from the FIFO.
FT2232H datasheet
(http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf)
Page 18 of 35
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