That is, the DP master writes its Data to these intermediate memory address areas
and the CPU reads these data in the user program, and vice versa.
DP master
Figure 9-10 Intermediate memory in CPU 31x-2 DP/31xC-2 DP as DP slave
Address areas in intermediate memory
In STEP 7, configure the I/O address areas:
• You can configure up to 32 I/O address areas.
• Maximum length per address area is 32 bytes.
• You can configure a maximum of 244 input bytes and 244 outputs bytes.
The table below shows the principle of address areas. You can also find this figure
in the STEP 7 configuration.
Table 9-10
Type
1
E
2
A
:
32
Address areas in the
DP master CPU
S7-300 Programmable Controller Hardware and Installation
A5E00105492-02
Transfer memory
in the address
area
PROFIBUS
Configuration example for the address areas in intermediate memory
Master
Type
Slave
address
address
222
A
310
0
E
13
Address areas in the
DP slave CPU
Commissioning
CPU as DP slave
I/Q
I/Q
Length
Unit
Consistency
2
Byte
Unit
10
Word
Total length
These address area parameters
must be identical for DP master and
DP slave
9-33