Digital Output - Internal Schematic; Digital Output - Wiring - XIMEA xiQ series Technical Manual

3.8.4.3. Digital Output – Internal schematic
Following scheme is the internal scheme of the Digital Output signal flow inside the camera.
FPGA_OUTPUT
Idrive=2m A
GND
figure 3-31, digital output, interface schematic
Output Transfer Characteristic
When Output is in On state - typical transfer characteristic of output is as on following figure:
V (V)
OUTPUT
2,0
1,8
1,6
1,4
1,2
1,0
0,8
0,6
0,4
0,2
0,0
0 5
figure 3-32, digital output transfer characteristics
3.8.4.4. Digital Output – Wiring
Digital output has an open collector switching transistor with common IO Ground. In most cases a power source for external
device must be provided.
3.8.4.4.1. Connecting Digital OUTPUT to a NPN-compatible PLC device input (biased)
Output state Output switch state
ON Sourcing current
OFF Relaxing
xiQ - Technical Manual Version 1.0
Output Transfer Characteristic (Receptacle)
10 15 20
Input state
Pull up (energized)
Not energized
PTC Fuse DIGITAL OUTPUT
1K
GND (Common IO Ground)
25 30
I (mA)
OUTPUT
I
LOA D
42