Libraries; Sisoft Parts; Ibis Files; Ibis-Ami Files - Xilinx virtex-5 fpga User Manual

Kit Overview
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Libraries

This kit consists of SiSoft parts, IBIS files, IBIS-AMI files and models, and package and
channel models.

SiSoft Parts

The SiSoft parts contained in the design kit are listed in
associated IBIS models.
Table 1-3: SiSoft Parts

IBIS Files

Table 1-4
Table 1-4: IBIS Files

IBIS-AMI Files

Table 1-5
Table 1-5: IBIS-AMI Files
10
T4_XTALK_0_AGGRESSOR: This transfer net contains the GTP transmitter, receiver,
package models, and sample crosstalk channel data. The sample channel model can
be replaced with an actual channel model (either as a single block of S parameters or
as a collection of individual schematic elements) to simulate the behavior of the Xilinx
IP with the channel. In this transfer net, the aggressors are quiet.
T5_XTALK_3_AGGRESSOR: This transfer net contains the GTP transmitter, receiver,
package models, and sample crosstalk channel data. The sample channel model can
be replaced with an actual channel model (either as a single block of S parameters or
as a collection of individual schematic elements) to simulate the behavior of the Xilinx
IP with the channel. In this transfer net, the aggressors are active.
SiSoft Part
v5_gtp_serdes
ideal
lists the IBIS files that are referenced from the SiSoft parts in this kit.
IBIS File
xilinx_v5_gtp.ibs
ideal.ibs
lists the IBIS-AMI files that are referenced from the IBIS files in this kit.
IBIS-AMI File
V5_GTP_AMI_Tx.ami
V5_GTP_AMI_Rx.ami
Tx_Source.ami
Rx_Probe.ami
www.xilinx.com
Table 1-3
IBIS Model
xilinx_v5_gtp.ibs
ideal.ibs
File Revision
1.0 GTP transmitter
1.0 Ideal driver/receiver
Virtex-5 FPGA GTP TX model
Virtex-5 FPGA GTP RX model
Ideal driver model
Ideal receiver model
Virtex-5 FPGA GTP Transceiver SIS Kit (IBIS-AMI)
along with their
IBIS Component
v5_gtp_serdes
Ideal
Description
Description
UG587 (v1.1) June 21, 2012