Dc Offset - Agilent Technologies 89410A Operator's Manual

Extending Analysis to 26.5 GHz with 20 MHz Information Bandwidth
Note
For additional details on how errors in the signal path can affect the spectrum,
refer to Product Note 89400-13, which contains most of the information in this
chapter plus one additional section, Appendix A. Appendix A contains a theoretical
discussion on three topics: how complex signals allow a doubling of bandwidth
relative to real-only signals, how the spectrum can be mirrored simply by
conjugating the complex time data, and how measurement errors can produce
spurious signals which reduce the dynamic range of a measurement.

DC Offset

Residual DC limits the dynamic range of the measurement by introducing a
spurious term in the center of the spectrum (zero hertz). The DC offset
calibration measures the amount of residual DC in both the I and Q channels
and determines the optimal settings for the offset DACs in the 70911A IF
module.
For DC offset, the two channels are independent of one another and are
calibrated separately. The following procedure describes the calibration for the
I channel. The same procedure is also performed on the Q channel.
At the start of the DC offset calibration, the example program instructs the
89410A to perform an internal offset calibration. This calibration removes DC
from the vector signal analyzer inputs without consideration of the input signal.
This is done so that subsequent internal calibrations, which are performed
automatically by the vector signal analyzer, will not affect the system
calibration.
After the vector signal analyzer's offset calibration, the example program
records the amount of DC remaining in the I channel along with the current
setting of the I channel offset DAC in the 70911A. The DAC is then adjusted by
a small amount and the amount of DC in the channel is measured again. The
two DC measurements (y1 and y2) and the two DAC values (x1 and x2) are
combined to determine the slope and offset of a line y=Ax+B where A is the
slope and B is the offset. The optimal setting for the DAC is then –B/A. This is
the value that drives y, the residual DC, to zero.
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