Chapter 3 Data Buffer Management; Data Buffer; Data Buffer Configuration And Basic Operation - Fujitsu MAA3182FC Series Manual

CHAPTER 3
In this chapter, the configuration of the data buffer with which the IDD is equipped, its operation and
the operation of the cache feature are described.
3.1

Data Buffer

3.1.1

Data buffer configuration and basic operation

The IDD is equipped with a 3,888 KB data buffer, which makes it possible to efficiently
execute data transfer operations between INIT (initiator) and a disk drive.
The data buffer, with a capacity of a 3,888 KB, can be divided into a maximum of 16 cache
segments (MAA3182FC)
MAG3182FC). Dividing of the data buffer is controlled by the MODE SELECT parameter
(cache segment parameter: Page code = 8).
Each data buffer is a 2 ports of FIFO (First-In First-Out) ring buffer, with one port allocated
for transfers with the disk media and the other port for data transfers with the FC interface.
Mutual ports operate asynchronously and since it is possible to efficiently absorb variations in
data transfer speed between the ports, the INIT can perform data transfer operations with the
IDD while being virtually unaware of differences between the FC interface data transfer rate
and the disk drive data transfer rate.
Even if the data transfer capacity of the FC interface (INIT) is lower than the disk drive's data
transfer rate, the data buffer can perform data transfers to the system under optimum
conditions without using sector interleave. Also, if the data transfer capacity of the FC
interface (INIT) is higher than the disk drive's data transfer rate, it is possible to minimize the
occupancy time on the SCSI bus by accumulating an appropriate amount of data in the data
buffer.
Only one cache segment of the divided data buffer is used by one command and the data in the
other cache segments are held. The cache segment to be used is determine by the LRU
algorithm.
Figure 3.1 shows the data buffer image.
DATA BUFFER MANAGEMENT
3.1 Data Buffer
3.2 Look-Ahead Cache Feature
3.3 Write Cache
and 32 cache
C141-E054-02EN
segments (MAF3364FC, MAG3091FC,
3 - 1