Ctrl And Pson Window - Analog Devices ADP1055-EVALZ User Manual

ADP1055-EVALZ User Guide
Synchronization Tab
Figure 26. Phase Delay Between SYNC Pulse and PWM Timing
The phase delay, that is, the alignment of the PWM set (OUTA
to OUTD and SR1, SR2) with synchronization pulse can be
programmed in this tab. For a full description of the SYNC
function, refer to the data sheet.
The SYNC settings can be changed in a simple drag-and-drop
fashion. The Apply Settings button is highlighted in red
whenever a change is made. Changes take place after Apply
Settings is clicked and are stored in the RAM of the IC, but
need to be saved to EEPROM for permanent storage.
Adaptive Dead Time (ADT) Tab
See the ADP1055 data sheet for detailed operation of the ADT
feature. In the example provided in this section, the GUI has
programmed the SR edges to become narrower when the load
has decreased to increase light load efficiency.
The ADT settings can be changed in a simple drag-and-drop
fashion or by merely checking/unchecking the respective
function. The Apply Settings button is highlighted in red
whenever a change is made. Changes take place after the
Apply Settings is clicked and are stored in the RAM of the IC,
but need to be saved to EEPROM for permanent storage.
Figure 27. ADT Window
Things to Try
1. Set up PWMs for additional topologies, such as active
clamp, isolated boost, and so on.
2. Use the SYNC feature of the
an external frequency.
ADP1055 to synchronize to
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CTRL AND PSON WINDOW

In this window, the configuration of the hardware and software
PSON can be programmed. Additional settings, such as the
extended slave address selection, voltage overshoot (regulation
timeout speed) and write protect mode, can be selected.
Figure 28. PSON Window
The settings can be changed by simply toggling the switches
or by selecting the suitable option from the drop-down menu.
Changes take place immediately and are stored in the RAM of
the IC, but need to be saved to EEPROM for permanent storage.
Overshoot Protection (Regulation Timeout) and DIP Test
The ADP1055 provides an overshoot protection feature
(regulation timeout). If enabled, a soft-start is run from the
precharge function whenever the output voltage is out of
regulation for a certain number of switching periods. This
prevents the system from overshooting in output voltage, such
as in the case of a DIP test where the input voltage dips below
nominal and puts the output voltage out of regulation. In
Figure 29, the PSU has been given a PSON signal several
minutes before the input voltage is above the VIN_UV
threshold.
Figure 29. Demonstration of Overshoot Protection at No Load
Green Trace: Output Voltage
Blue Trace: Input Voltage
Red Trace: PWM
UG-710