Introduction - Intel 500 - DATASHEET REV 003 Datasheet

Introduction

1 Introduction
This document covers the Intel® Celeron® processor 500 series for platforms based on
Mobile Intel® 965 Express Chipset family. It is based on the new Intel® Core™
microarchitecture.
In this document the Celeron processor 500 series is referred to as the processor.
The following list provides some of the key features of this processor:
• Single core
• On-die, primary 32-KB instruction cache and 32-KB write-back data cache
• On-die, 1-MB second level shared cache with advanced transfer cache architecture
• 533-MHz source-synchronous front side bus (FSB)
• Supports Intel® architecture with dynamic execution
• Data prefetch logic
• Micro-FCPGA packaging technology
• MMX™ technology, Streaming SIMD Extensions (SSE), Streaming SIMD Extensions
2 (SSE2), Streaming SIMD Extensions 3 (SSE3), and Supplemental Streaming
SIMD Extensions 3 (SSSE 3)
• Digital Thermal Sensor (DTS)
• Execute Disable Bit support for enhanced security
• Intel® 64 architecture (formerly Intel® EM64T)
• Architectural and performance enhancements of the Core microarchitecture.
Note: Unless specified otherwise, all references to the processor in this document are
references to the Celeron processor 500 series with a 533-MHz FSB on Mobile Intel 965
Express Chipset family-based systems.
Datasheet
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