Terminology - Intel 500 - DATASHEET REV 003 Datasheet

1.1

Terminology

Term
#
AGTL+
Front Side Bus
(FSB)
Intel® 64
Technology
Processor Core
Storage
Conditions
V
CC
V
SS
8
A "#" symbol after a signal name refers to an active low signal, indicating a
signal is in the active state when driven to a low level. For example, when
RESET# is low, a reset has been requested. Conversely, when NMI is high,
a nonmaskable interrupt has occurred. In the case of signals where the
name does not imply an active state but describes part of a binary
sequence (such as address or data), the "#" symbol implies that the signal
is inverted. For example, D[3:0] = "HLHL" refers to a hex 'A', and D[3:0]#
= "LHLH" also refers to a hex "A" (H= High logic level, L= Low logic level).
XXXX means that the specification or value is yet to be determined.
Advanced Gunning Transceiver Logic. Used to refer to Assisted GTL+
signaling technology on some Intel processors.
Refers to the interface between the processor and system core logic (also
known as the chipset components).
64-bit memory extensions to the IA-32 architecture.
Processor core die with integrated L1 and L2 cache. All AC timing and
signal integrity specifications are at the pads of the processor core.
Refers to a non-operational state. The processor may be installed in a
platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor lands should not be
connected to any supply voltages, have any I/Os biased or receive any
clocks. Upon exposure to "free air" (unsealed packaging or a device
removed from packaging material) the processor must be handled in
accordance with moisture sensitivity labeling (MSL) as indicated on the
packaging material.
The processor core power supply.
The processor ground.
Definition
Introduction
Datasheet