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Figure 3.
Active V
V
[V]
CC
V
max
CC
V
max
CC, DC
V
nom
CC
V
min
CC, DC
V
min
CC
N o t e 1 / V
T o l e r a n c e
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ / - 1 . 5 %
+ / - 1 1 . 5 m V
Table 7.
FSB Differential BCLK Specifications
Symbol
Parameter
V
Input High Voltage
IH
V
Input Low Voltage
IL
V
Crossing Voltage
CROSS
ΔV
Range of Crossing Points
CROSS
V
Threshold Region
TH
I
Input Leakage Current
LI
CPAD
Pad Capacitance
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the falling edge of
BCLK1.
3.
Threshold Region is defined as a region entered about the crossing voltage in which the differential receiver
switches. It includes input threshold hysteresis.
4.
For Vin between 0 V and V
5.
Cpad includes die capacitance only. No package parasitics are included.
6.
ΔV
is defined as the total variation of all crossing voltages as defined in note 2.
CROSS
26
and I
Loadline Standard Voltage
CC
CC
Slope = -2.1 mV/A at package
VccSense, VssSense pins.
Differential Remote Sense required.
+/-V
nom * 1.5%
CC
= VR St. Pt. Error 1/
0
S e t P o i n t E r r o r T o l e r a n c e i s p e r b e l o w :
C C
V
A c t i v e M o d e V I D C o d e R a n g e
C C
V
> 0 . 7 5 0 0 V ( V I D 0111100) .
C C
V
< 0 . 7 5 0 0 V ( V I D 0111100)
C C
V
CROSS
.
IH
10 mV= RIPPLE
Min
Typ
0.660
0.710
0
0.25
0.35
- 0.100
0.95
1.2
Electrical Specifications
I
CC
I
max
CC
Max
Unit
Notes
0.85
V
V
0.55
V
0.14
V
V
+0.100
V
CROSS
±100
µA
1.45
pF
Datasheet
[A]
1
2
6
3
4
5
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