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I/O Connector, J22: Rows A, B, & C (continued)
Signal
X0D_L(1)
X0D_L(0)
GND
NMI_5V
I2C_BMC_SDA
I2C_BMC_SCL
BMC_SPI_BUS(0)
BMC_SPI_BUS(6)
BMC_SPI_BUS(1)
IO_TDO
IO_TCK
COM2_TO_FP_EN
I/O Connector, J22: Rows D & E
Signal
X1HSTBN_L
X1HSTBP_L
GND
X1XSTBP_L
GND
I2C_BACKUP_SDA
GND
I2C_BACKUP_SCL
GND
I2C_CEL_ CONNECT
GND
PWR_CNTRL_RTC
GND
FP_NMI_SWT_L
PS_PWR_ON
X1IB_L
RESERVED
FP_TO_PIIX4_PWR
GND
ISP_EN2_L
-12V
ISP_FPC_EN_L
Chapter 18 CPU Baseboard: Description/Setting Configuration Jumpers
Pin
Signal
A37
X0XRTS_L
A38
GND
A39
IGNNE_L
A40
GND
A41
BMC_SPI_BUS(3)
A42
GND
A43
CPU_CPI_RESET_L
A44
GND
A45
IO_TDI
A46
GND
A47
XIMB_ SOUT_ENT
A48
GND
Pin
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
Pin
Signal
B37
X0HRTS_L
B38
GND
B39
I2C_GLOBAL_SDA
B40
SMI_L
B41
BMC_SPI_BUS(5)
B42
GND
B43
PROC_ RESET_L
B44
A20M_L
B45
PWRGDB
B46
IO_TMS
B47
SIN_TTL_ COM2
B48
GND
Signal
GND
GND
GND
RESERVED
GND
MIOC_INTREQ_L
GND
X1RST_L
GND
X1BLK_L
GND
I2C_CEL_ CONNECT_FPC
GND
PWR_CNTRL_SFC_L
GND
PWR_GOOD
GND
SECURE_MODE_BMC
GND
CPU_SLP_L
GND
-12V
Pin
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
Pin
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
continued
227
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