Spi; Figure 11-2. Spi Connections - Nvidia Jetson TX2 NX Manual

11.2

SPI

The Jetson TX2 NX brings out two of the Tegra X2 SPI interfaces. See Figure 11-2.
Table 11-4. Jetson TX2 NX SPI Pin Description
Pin # Module Pin Name Tegra X2 Signal
89 SPI0_MOSI GPIO_WAN7
91 SPI0_SCK GPIO_WAN5
93 SPI0_MISO GPIO_WAN6
95 SPI0_CS0* GPIO_WAN8
GPIO_MDM4
97 SPI0_CS1*
(SPI1_CS1 SFIO)
GPIO_SEN3
104 SPI1_MOSI
(SPI2_DOUT SFIO)
GPIO_SEN1
106 SPI1_SCK
(SPI2_CLK SFIO)
GPIO_SEN2
108 SPI1_MISO
(SPI2_DIN SFIO)
GPIO_SEN4
110 SPI1_CS0*
(SPI2_CS0 SFIO)
Notes:
1. In the Type/Dir column, Output is from Jetson TX2 NX. Input is to Jetson TX2 NX. Bidir is for Bidirectional signals.
2.
The directions for SPI[1:0]x are true when used for those functions. Otherwise as GPIOs, the directions are bidirectional.
Figure 11-2. SPI Connections
Jetson
Tegra – SPI
UART
GPIO_WAN5
GPIO_WAN6
GPIO_WAN7
GPIO_WAN8
GPIO_MDM4
AO
GPIO_SEN1
GPIO_SEN2
GPIO_SEN3
GPIO_SEN4
NVIDIA Jetson TX2 NX
Usage/Description
SPI 0 Master Out / Slave In
SPI 0 Clock
SPI 0 Master In / Slave Out
SPI 0 Chip Select 0
SPI 0 Chip Select 1
SPI 1 Master Out / Slave In
SPI 1 Clock
SPI 1 Master In / Slave Out
SPI 1 Chip Select 0
SPI0_SCK
91
SPI0_MISO
93
SPI0_MOSI
89
SPI0_CS0*
95
SPI0_CS1*
97
SPI1_SCK
106
SPI1_MISO
108
SPI1_MOSI
104
SPI1_CS0*
110
Miscellaneous Interfaces
Usage on DevKit
Direction
Carrier Board
Expansion header Bidir
Routed to 40-pin
Expansion Header on
DevKit carrier board
DG-10141-001_v1.1 | 60
Pin Type
CMOS – 1.8V