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7.2.2.1
HDMI Routing Guidelines
Figure 7-8 shows the HDMI CLK and data topology.
Figure 7-8.
HDMI CLK and Data Topology
Jetson
Main Route –
Tegra
PCB Vias
Notes:
1. RPD pad must be on the main trace. RPD and ACCAP must be on same layer.
2. Chokes (600Ω @ 100 MHz) or narrow traces (1uH@DC-100 MHz) between pull-downs and FET
are chokes between pull-downs and FET are optional improvements for HDMI 2.0 operation.
3. The trace after the main route via should be routed on the top or bottom layer of the PCB,
and either with 100 ohm differential impedance, or as uncoupled 50 ohm SE traces.
4. RS series resistor is required. See the RS section of Table 7-9 for details.
Table 7-9.
HDMI Interface Signal Routing Requirements
Parameter
Specification
Max frequency / UI
Topology
Termination
At receiver
On-board
Electrical Specification
IL
Resonance dip frequency
TDR dip
FEXT (PSFEXT)
NVIDIA Jetson TX2 NX
AC
CAP
Seg A
0.1uF
Seg B
Seg D
95-100Ω
100Ω*
* Note 3
* Note 3
0.1uF
95-100Ω
100Ω*
Seg C
499Ω,
499Ω,
R
PD
1%
1%
PCB Vias
MOD_SLEEP*
Requirement
5.94 / 168
Point to point
100
500
<= 1.7
<= 2
<= 3
< 6
> 12
>= 85
<= -50
<= -40
Common Mode
R
S
Chokes & ESD
(See Note 4)
Seg E
Seg F
100Ω*
100Ω*
100Ω*
HDMI
* Note 3
* Note 3
Conn
100Ω*
100Ω*
100Ω*
See Note 1
Choke or Trace
See Note 2
Units
Gbps / ps
Ω
dB @ 1GHz
dB @ 1.5GHz
dB @ 3GHz
dB @ 6GHz
GHz
Ω @ Tr=200ps
dB at DC
dB at 3GHz
Display
Notes
Per lane – not total link bandwidth
Unidirectional, differential
Differential To 3.3V at receiver
To GND near connector
10%-90%. If TDR dip is 75~85ohm
that dip width should < 250ps
PSNEXT is derived from an algebraic
summation of the individual NEXT
effects on each pair by the other pairs
DG-10141-001_v1.1 | 39
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