Xilinx Virtex-6 FPGA Getting Started Manual page 73

Connectivity kit
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13. Verify the line rates for the GTX transceivers (see
X-Ref Target - Figure 76
14. Configure the GTX transmit parameter settings (see
X-Ref Target - Figure 77
Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
Getting Started with the Virtex-6 FPGA IBERT Reference Design
a.
The line rate is set to 3.125 Gb/s for all four GTX transceiver channels instantiated
in the design.
b. The GTX0_113 and GTX1_113 transceiver channels have been looped on external
loopback through a SATA cable. Select the loopback mode for these transceiver
channels as None (no internal loopback). The GTX2_113 and GTX3_113
transceiver channels have been looped on external loopback through an SMA
cable. Select the loopback mode for these transceiver channels as None (no
internal loopback).
Figure 76: Verify the GTX Transceiver Loopback Configuration and Link Status
a.
Set the TX Diff Output Swing parameter to 590 mV (0110) for the SATA channels
and 365 mV for the SMA channels.
b. Set the TX Pre-Emphasis parameter to 0 dB (000).
Figure 77: Modifying the Transmitter Settings of the GTX Transceiver Channels
www.xilinx.com
Figure
76):
UG664_53_011710
Figure
77):
UG664_54_021810
73

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