Xilinx Virtex-6 FPGA Getting Started Manual page 3

Date Version
07/06/11 1.4
(Cont'd)
UG664 (v1.4) July 6, 2011
Updated step 1 on page page
and Status GUI, and Figure 26: Run v6_trd_quickstart. Corrected coregen command in
step 4c on page 42. Updated ending step instruction from step 8 to step 6 in
Added Windows Driver. Added
Updated step 2a and step 3a on
and Figure 61.
www.xilinx.com
Revision
33. Removed Figure 25: Launch the Performance Monitor
Linux Driver heading before
page 56. Updated Table 1. Updated
Virtex-6 FPGA Connectivity Kit Getting Started
Test Setup.
step 1 on page 56.
Figure 52 Figure 54,