Characteristics - Omron SYSMAC CPM2B Operation Manual

Programmable controller
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Specifications

2-1-2 Characteristics

Item
Control method
I/O control method
Programming language
Instruction length
Instructions
Basic instructions
Special
instructions
Execution time
Basic instructions
Special
instructions
Program capacity
Max. I/O
CPU Board only
capacity
With Expansion
I/O Boards
Input bits
Output bits
Work bits
Special bits (SR area)
Temporary bits (TR area)
Holding bits (HR area)
Auxiliary bits (AR area)
Link bits (LR area)
Timers/Counters
Data memory
Read/Write
Read-only
PC Setup
Interrupt
External interrupts
processing
Interval timer
interrupts
High-speed
High-speed counter 1 (20 kHz single-phase or 5 kHz two-phase (linear count method))
counter
Counter interrupt
Interrupt Inputs
(Counter mode)
Counter interrupts 4 (Also used for the external interrupt inputs and quick-response inputs.)
Pulse output
With relay outputs
Stored program method
Cyclic scan with direct output (Immediate refreshing can be performed with
IORF(97).)
Ladder diagram
1 step per instruction, 1 to 5 words per instruction
14
105 instructions, 185 variations
0.64 µs (LD instruction)
7.8 µs (MOV instruction)
4,096 words
32 points
128 points max.
IR 00000 to IR 00915 (Words not used for input bits can be used for work bits.)
IR 01000 to IR 01915 (Words not used for output bits can be used for work bits.)
928 bits: IR 02000 to IR 04915 and IR 20000 to IR 22715
448 bits: SR 22800 to SR 25515
8 bits (TR0 to TR7)
320 bits: HR 0000 to HR 1915 (Words HR 00 to HR 19)
384 bits: AR 0000 to AR 2315 (Words AR 00 to AR 23)
256 bits: LR 0000 to LR 1515 (Words LR 00 to LR 15)
256 timers/counters (TIM/CNT 000 to TIM/CNT 255)
1-ms timers: TMHH(––)
10-ms timers: TIMH(15)
100-ms timers: TIM
1-s/10-s timers: TIML(––)
Decrementing counters: CNT
Reversible counters: CNTR(12)
2,048 words (DM 0000 to DM 2047) The Error Log is contained in DM 2000 to
DM 2021.
456 words (DM 6144 to DM 6599)
56 words (DM 6600 to DM 6655)
4 (Also used for external interrupt inputs in counter mode and quick-response
inputs.)
1 (Scheduled Interrupt Mode or Single Interrupt Mode)
1 (set value comparison or set-value range comparison)
4 inputs (Also used for interrupt inputs and quick-response inputs.)
2 points with no acceleration/deceleration, 10 Hz to 10 kHz each, and no direction
control.
1 point with trapezoidal acceleration/deceleration, 10 Hz to 10 kHz, and direction
control.
2 points with variable duty-ratio outputs.
(Pulse outputs can be used with transistor outputs only, they cannot be used with
relay outputs.)
CPU Boards
With transistor outputs
Section
2-1
23

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