Clock Reference Phase Tuning; Internal Clock Generator; External Clock; Clock Reference Output - Teledyne ADQ8-4X Manual

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The connector on the front panel accepts a clock reference from external equipment. The clock refer-

ence quality is improved in a jitter cleaning circuitry. To match the tuning of the jitter cleaning circuitry

the clock reference has to be 10 MHz.

The PXI Express allows clock reference input from the backplane, and can then benefit from the infra-

structure of the chassis.

5.6 Clock reference phase tuning

There is a tuning of the clock reference phase. See

There is an internal high quality clock generator that is used for generating the Sampling Clock for the

A/D converters. The data and trigger clocks are also generated by this clock generator.

If the system is designed with an external high quality signal it may be used for clocking the ADQ. If an

external clock source is used, all the internal clocks are generated from that to maintain the phase and

frequency ratio.

In addition to the synchronization solution with an external clock reference source, the digitizer can also

act as master and output its clock reference to external equipment. The selected clock reference

source will then be present at the clock connector on the front panel. Note that the connector is shared

with clock input.

The data rate out from the A/D converter is set by the sample rate of the digitizer. The data rate can be

reduced by the sample skip function. Setting the sample skip factor to, for example, 4 means that every

4th sample is kept and the others are discarded. This will efficiently reduce the data rate.

Note that there is no decimation filter in this function.

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2020-09-16

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