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Figure 14: Bussed connections
4.9 External trigger in the backplane
4.9.1
PXIe interface
There are an external trigger in the backplane of the PXIe version. The DSTAR signals are dedicated
matched trigger lines from the system timing slot. To use these triggers, a dedicated timing generation
board has to be used in the system timing slot. The TRIG bus is a general bus in the backplane which
can be used for triggering. The digitizer support connection to port 0 and port 1 of that bus.
The backplane trigger support both input and output triggers. These operations are independent and
can be used simultaneously.
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