Table of Contents
Advertisement
ence to the sampling clock rate. The digitizer supports its specified sample rate only. This sample rate
can be tuned to allow phase locking to external equipment.
To reduce the sample-rate, a sample skip function is available.
Block diagram of the clock network for ADQ8-4X-PXIe is given in
*
./0
+,
1 2
+,
-* *
./0-
#
DESCRIPTION
a
The input SMA connector is common for external clock reference input,
external clock input. The impedance is 50 .
b
The output MCX connector drives the selected clock reference source to
enable synchronization of other equipment.
c
The backplane clocks are available for synchronization.
d
Select which clock reference source to use
e
Delay line to fine tune the phase of the sampling clock
f
Jitter reduction circuit.
g
The internal clock reference is a high performance VCTCXO.
h
The internal clock generator for the sampling clock
i
Select which sampling clock source to use; internal or direct external
sampling clock.
j
Reduce sample rate with sample skip.
k
Turn on clock reference output.
Figure 22: ADQ8-4X-PXIe clock network.
5.3 ADQ8-4X-PCIe front panel connectors
The front panel SMA connector is used for external clock reference input or direct external sampling
clock input. The input impedance is 50 to match the cable impedance.
The front panel MCX connector is used for clock reference output.
5.4 Internal clock reference
The internal clock reference is a high accuracy VCTCXO at 10 MHz.
5.5 External clock reference
The free running internal clock reference of the digitizer offers high precision and is suitable for most
measurements. However, for some applications an absolute phase-lock to other parts of the system
may be necessary. To support that, the ADQ offers several options to accept an external clock refer-
ence. A long-term phase stability to other equipment is then guaranteed.
19-2302 A
2020-09-16
+ ,
!
!
+,
+,
+,
Figure
22.
3
+,
+ ,
+,
+,
USER COMMAND
SetClockSource
EnableClockRefOut
SetClockSource
SetExternalReferenceFre
quency
AdjustClockReferenceDe
lay
SetClockSource
SetSampleSkip
EnableClockRefOut
ADQ8-4X Manual
19-2302 A 2020-09-16
31(46)
#2
#
+,
+4,
REF
5.3
5.3
5.9
5.6
5.4
5.7
5.8
5.10
5.9
31(46)
Advertisement
Table of Contents
