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deassert
doping
double word
dword
edge-triggered
encryption array
EPROM
external address
FET
idle mode
input leakage
integer
internal address
The term deassert refers to the act of making a signal
inactive (disabled). The polarity (high/low) is defined
by the signal name. Active-low signals are designated
by a pound symbol (#) suffix; active-high signals have
no suffix. To deassert RD# is to drive it high; to
deassert ALE is to drive it low.
The process of introducing a periodic table Group III
or Group V element into a Group IV element (e.g.,
silicon). A Group III impurity (e.g., indium or
gallium) results in a p-type material. A Group V
impurity (e.g., arsenic or antimony) results in an n-
type material.
A 32-bit unit of data. In memory, a double word
comprises four contiguous bytes.
See double word.
The mode in which a device or component recognizes
a falling edge (high-to-low transition), a rising edge
(low-to-high transition), or a rising or falling edge of
an input signal as the assertion of that signal. See also
level-triggered.
An array of key bytes used to encrypt user code in the
on-chip code memory as that code is read; protects
against unauthorized access to user's code.
Erasable, programmable read-only memory
A 16-bit or 17-bit address presented on the device
pins. The address decoded by an external device
depends on how many of these address bits the
external system uses. See also internal address.
Field-effect transistor.
The power conservation mode that freezes the core
clocks but leaves the peripheral clocks running.
Current leakage from an input pin to power or ground.
Any member of the set consisting of the positive and
negative whole numbers and zero.
The 24-bit address that the device generates. See also
external address.
GLOSSARY
Glossary-3
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