Intel 8XC251SA User Manual page 200

8XC251SA, SB, SP, SQ USER'S MANUAL
PCON
7
SMOD1 SMOD0
Bit Bit
Number Mnemonic
7 SMOD1
6 SMOD0
5 —
4 POF
3 GF1
2 GF0
1 PD
0 IDL
12-2
— POF
Double Baud Rate Bit:
When set, doubles the baud rate when timer 1 is used and mode 1, 2, or
3 is selected in the SCON register. See section 10.6, "Baud Rates."
SCON.7 Select:
When set, read/write accesses to SCON.7 are to the FE bit.
When clear, read/write accesses to SCON.7 are to the SM0 bit.
See Figure 10-2 on page 10-3 (SCON).
Reserved:
The value read from this bit is indeterminate. Write a zero to this bit.
Power Off Flag:
Set by hardware as V
off or V had fallen below 3 V and that on-chip volatile memory is
CC
indeterminate. Set or cleared by software.
General Purpose Flag:
Set or cleared by software. One use is to indicate whether an interrupt
occurred during normal operation or during idle mode.
General Purpose Flag:
Set or cleared by software. One use is to indicate whether an interrupt
occurred during normal operation or during idle mode.
Powerdown Mode Bit:
When set, activates powerdown mode.
Cleared by hardware when an interrupt or reset occurs.
Idle Mode Bit:
When set, activates idle mode.
Cleared by hardware when an interrupt or reset occurs.
If IDL and PD are both set, PD takes precedence.
Figure 12-1. Power Control (PCON) Register
Reset State:
GF1 GF0
Function
rises above 3 V to indicate that power has been
CC
Address: S:87H
00XX 0000B
0
PD IDL