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8XC251SA, SB, SP, SQ USER'S MANUAL
IE0
7
EA
EC
Bit
Bit
Number
Mnemonic
7
EA
6
EC
5
ET2
4
ES
3
ET1
2
EX1
1
ET0
0
EX0
6-6
ET2
ES
Global Interrupt Enable:
Setting this bit enables all interrupts that are individually enabled by bits
0–6. Clearing this bit disables all interrupts, except the TRAP interrupt,
which is always enabled.
PCA Interrupt Enable:
Setting this bit enables the PCA interrupt.
Timer 2 Overflow Interrupt Enable:
Setting this bit enables the timer 2 overflow interrupt.
Serial I/O Port Interrupt Enable:
Setting this bit enables the serial I/O port interrupt.
Timer 1 Overflow Interrupt Enable:
Setting this bit enables the timer 1 overflow interrupt.
External Interrupt 1 Enable:
Setting this bit enables external interrupt 1.
Timer 0 Overflow Interrupt Enable:
Setting this bit enables the timer 0 overflow interrupt.
External Interrupt 0 Enable:
Setting this bit enables external interrupt 0.
Figure 6-2. Interrupt Enable Register
Address:
Reset State:
ET1
EX1
ET0
Function
S:A8H
0000 0000B
0
EX0
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