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Clear Bit
Set Bit
Complement Bit
AND Carry with Bit
AND Carry with Complement of Bit
OR Carry with Bit
ORL Carry with Complement of Bit
Move Bit to Carry
Move Bit from Carry
Mnemonic
<src>,<dest>
CY
CLR
bit51
bit
CY
SETB
bit51
bit
CY
CPL
bit51
bit
CY,bit51
ANL
CY,bit
CY,/bit51
ANL/
CY,/bit
CY,bit51
ORL
CY,bit
CY,/bit51
ORL/
CY,/bit
CY,bit51
CY,bit
MOV
bit51,CY
bit,CY
NOTES:
1.
A shaded cell denotes an instruction in the MCS
2.
If this instruction addresses an I/O port (P x , x = 0–3), add 2 to the number of states.
3.
If this instruction addresses an I/O port (P x , x = 0–3), add 1 to the number of states.
Table A-26. Summary of Bit Instructions
CLR bit
SETB bit
CPL bit
ANL CY,bit
ANL CY,/bit
ORL CY,bit
ORL CY,/bit
MOV CY,bit
MOV bit,CY
Notes
Clear carry
Clear dir bit
Clear dir bit
Set carry
Set dir bit
Set dir bit
Complement carry
Complement dir bit
Complement dir bit
AND dir bit to carry
AND dir bit to carry
AND complemented dir bit to carry
AND complemented dir bit to carry
OR dir bit to carry
OR dir bit to carry
OR complemented dir bit to carry
OR complemented dir bit to carry
Move dir bit to carry
Move dir bit to carry
Move carry to dir bit
Move carry to dir bit
®
INSTRUCTION SET REFERENCE
bit ← 0
bit ← 1
bit← Øbit
CY ← CY Λ bit
CY ← CY Λ Øbit
CY ← CY V bit
CY ← CY V Øbit
CY ← bit
bit ← CY
Binary Mode
Bytes States Bytes States
1
2
4
1
2
4
1
2
4
2
4
2
4
2
4
2
4
2
4
2
4
51 architecture.
Source Mode
1
1
1
2 (2)
2
2 (2)
4
3
3
1
1
1
2 (2)
2
2 (2)
4 (2)
3
3 (2)
1
1
1
2 (2)
2
2 (2)
4 (2)
3
3 (2)
1 (3)
2
1 (3)
3 (3)
3
2 (3)
1 (3)
2
1 (3)
3 (3)
3
2 (3)
1 (3)
2
1 (3)
3 (3)
3
2 (3)
1 (3)
2
1 (3)
3 (3)
3
2 (3)
1 (3)
2
1 (3)
3 (3)
3
2 (3)
2 (2)
2
2 (2)
4 (2)
3
3 (2)
A-23
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