Omron CPM2C Operation Manual page 49

Item Item
Link bits (LR area)
Timers/Counters
Data memory
Interrupt processing g
Interval timer interrupts
High-speed counter
Interrupt Inputs
(Counter mode) (C d )
Pulse output
Synchronized pulse
control
Q Quick-response inputs
Input time constant
(ON response time =
OFF response time)
Clock function
Communications functions A CPM2C-CN111, CS1W-CN114, or CS1W-CN118 Connecting Cable is required to
Memory protection
(See notes 1 and 2.)
10 I/O points
(Relay outputs)
256 bits: LR 0000 to LR 1515 (Words LR 00 to LR 15)
256 timers/counters (TIM/CNT 000 to TIM/CNT 255)
1-ms timers: TMHH(----)
10-ms timers: TIMH(15)
100-ms timers: TIM
1-s/10-s timers: TIML(----)
Decrementing counters: CNT
Reversible counters: CNTR(12)
Read/Write: 2,048 words (DM 0000 to DM 2047)*
Read-only: 456 words (DM 6144 to DM 6599)
PC Setup: 56 words (DM 6600 to DM 6655)
*The Error Log is contained in DM 2000 to DM 2021.
2 interrupts
Shared by the external interrupt inputs (counter mode) and the quick-response inputs.
1 (Scheduled Interrupt Mode or Single Interrupt Mode)
One high-speed counter: 20 kHz single-phase or 5 kHz two-phase (linear count method)
Counter interrupt: 1 (set value comparison or set-value range comparison)
2 inputs
Shared by the external interrupt inputs and the quick-response inputs.
Two points with no acceleration/deceleration, 10 Hz to 10 kHz each, and no direction
control.
One point with trapezoid acceleration/deceleration, 10 Hz to 10 kHz, and direction control.
Two points with variable duty-ratio outputs.
(Pulse outputs can be used with transistor outputs only, they cannot be used with relay
outputs.)
One point:
A pulse output can be created by combining the high-speed counter with pulse outputs and
multiplying the frequency of the input pulses from the high-speed counter by a fixed factor.
(This output is possible with transistor outputs only, it cannot be used with relay outputs.)
2 inputs
Shared by the external interrupt inputs and the interrupt inputs (counter mode).
Min. input pulse width: 50 µs max.
Can be set for all input points.
(1 ms, 2 ms, 3 ms, 5 ms, 10 ms, 20 ms, 40 ms, or 80 ms)
Shows the year, month, day of the week, day, hour, minute, and second. (Battery backup)
The following CPU Units have a built-in clock: CPM2C-10C1DR-D, CPM2C-10C1DTC-D,
CPM2C-10C1DT1C-D, CPM2C-20C1DTC-D, and CPM2C-20C1DT1C-D.
connect to the CPM2C's communications port.
Peripheral port:
Supports Host Link, peripheral bus, no-protocol, or Programming Console connections.
RS-232C port:
Supports Host Link, no-protocol, 1:1 Slave Unit Link, 1:1 Master Unit Link, or 1:1 NT Link
connections.
HR area, AR area, program contents, read/write DM area contents, and counter values
maintained during power interruptions.
CPU Unit Specification
10 I/O points
(Transistor outputs)
2 interrupts
2 inputs
2 inputs
Section 2-2
20 I/O points
(Transistor outputs)
4 interrupts
4 inputs
4 inputs