Siemens SIMATIC S5 Manual page 119

S5-115F Manual
Latching on-delay and reset
Example:
Output Q 4.3 is set 5 sec. after input I 3.3.
Further changes in the signal state at input I 3.3 do not affect the output.
Input I 3.2 resets timer T 4 to its initial value and sets output Q 4.3 to zero.
Timing Diagram
Signal states
1
0
1
0
1
0
5
STL
A I 3.3
L KT 50.1
SS T 4
A I 3.2
R T 4
NOP 0
*
NOP 0
*
A T 4
= Q 4.3
* NOP 0 is required if the program is to be represented in LAD or CSF in the PG 635, PG 670, PG 675, PG 685, PG 695 or
PG 750 programmers. NOP 0 operations are automatically assigned when programming in LAD and CSF.
Note
The time tolerance is calculated as the sum of the time base and the maximum interval
between the FB 254 SYNC synchronization block calls.
EWA 4NEB 811 6149-02
I 3.3
I 3.2
Q 4.3
Time
5
CSF
T 4
T s
I 3.3
KT 50.1
TV BI
DE
I 3.2 R Q
T 4
in sec.
H 1: Auxiliary relay
I 3.3
KT 50.1
I 3.2
Q 4.3
STEP 5 Operations
Circuit Diagram
I 3.2
I 3.3
H 1
Q 4.3 H 1
LAD
T 4
T s
TW BI
DE
Q 4.3
R Q
H 1
3-23