1
No. Pin Name I/O
A
−
91 V+2X
Core power supply (+2.5V)
−
92 V+3M
I/O power supply (+3.3V)
−
93 GNDD
Ground
94 AD10
I/O PCI address/data
95 AD09
I/O PCI address/data
96 AD08
I/O PCI address/data
97 AD07
I/O PCI address/data
98 AD06
I/O PCI address/data
99 AD05
I/O PCI address/data
100 AD04
I/O PCI address/data
B
101 AD03
I/O PCI address/data
102 AD02
I/O PCI address/data
−
103 GNDD
Ground
104 DONE
O
PCIF (Xilinx) configuration termination signal 149 D10
−
105 V+3M
I/O power supply (+3.3V)
106 SYSRST
I
Reset input
107 PTE2
I/O PCIF (Xilinx) configuration initial signal
108 D07
I/O SH data bus
109 A01
I
SH address bus
C
110 A00
I
SH address bus
111 D31
I/O SH data bus
112 D30
I/O SH data bus
113 D29
I/O SH data bus
114 D28
I/O SH data bus
115 D06
I/O SH data bus
−
116 GNDD
Ground
−
117 V+3M
I/O power supply (+3.3V)
−
118 V+2X
Core power supply (+2.5V)
119 D05
I/O SH data bus
D
120 D27
I/O SH data bus
121 D26
I/O SH data bus
122 D25
I/O SH data bus
123 D24
I/O SH data bus
−
124 GNDD
Ground
125 D23
I/O SH data bus
126 D04
I/O SH data bus
127 D22
I/O SH data bus
−
128 V+2X
Core power supply (+2.5V)
129 D21
I/O SH data bus
−
E
130 V+3M
I/O power supply (+3.3V)
−
131 GNDD
Ground
132 D20
I/O SH data bus
133 D19
I/O SH data bus
134 D18
I/O SH data bus
135 D03
I/O SH data bus
F
182
1
2
Pin Function
No. Pin Name I/O
136 D17
137 GNDD
138 D16
139 D15
140 D14
141 D13
142 D02
143 V+2X
144 V+3M
145 GNDD
146 D01
147 D12
148 D11
150 D09
151 D08
152
153 D00
154
155 CLK40P
156 V+3M
157 RESERVE
158 GNDD
159 RESERVE
160 CS6
161 WE0
162 RD
163 BS
164 WAIT
165 IRQ4
166 RESERVE
167 BWAIT
168 BD7
169 GNDD
170 V+3M
171 V+2X
172 BD6
173 BD5
174 BD4
175 BD3
176 BD2
177 GNDD
178 BD1
179 BD0
180 BDACK
PRV-LX10
2
3
I/O SH data bus
−
Ground
I/O SH data bus
I/O SH data bus
I/O SH data bus
I/O SH data bus
I/O SH data bus
−
Core power supply (+2.5V)
−
I/O power supply (+3.3V)
−
Ground
I/O SH data bus
I/O SH data bus
I/O SH data bus
I/O SH data bus
I/O SH data bus
I/O SH data bus
D00
−
Not used
(IRQOUT)
I/O SH data bus
RESERVE
O
Status LED
(STATUS)
I
40MHz clock input (2)
−
I/O power supply (+3.3V)
−
Resereved
−
Ground
−
Resereved
I
SH chip select 6
I
Write enable 0
I
SH read
I
SH bus start
O
WAIT output
O
Interruption output
−
Resereved
I
WAIT input from AV-1
−
MPEG bit stream output
−
Ground
−
I/O power supply (+3.3V)
−
Core power supply (+2.5V)
−
MPEG bit stream output
−
MPEG bit stream output
−
MPEG bit stream output
−
MPEG bit stream output
−
MPEG bit stream output
−
Ground
−
MPEG bit stream output
−
MPEG bit stream output
−
MPEG bit stream acknowledge
3
4
Pin Function
Connect to CS6
4