1
No. Pin Name I/O
A
181 SDO_ENA
O
Digital output switching signal
182 27MFPGA
I
27MHz clock for FPGA
−
183 GNDDI
GND
−
184 V+3_3I
+3.3V
185 27MDEC
I
27MHz clock of AV1 output
−
186 V+2_5I
+2.5V
187 DV_VAIKILTD0
I
656 video data of VAIKILT output
188 DV_VAIKILTD1
I
656 video data of VAIKILT output
DV_VAIKILTD2
189
I
656 video data of VAIKILT output
B
−
190 GNDDI
GND
191 DV_VAIKILTD3
I
656 video data of VAIKILT output
192 DV_VAIKILTD4
I
656 video data of VAIKILT output
193 DV_VAIKILTD5
I
656 video data of VAIKILT output
194 DV_VAIKILTD6
I
656 video data of VAIKILT output
C
D
E
F
174
1
2
Pin Function
No. Pin Name I/O
195 DV_VAIKILTD7
196 V+2_5I
197 V+3_3I
198 GNDDI
199 WMKD0
200 WMKD1
201 WMKD2
202 WMKD3
203 WMKD4
204 WMKD5
205 WMKD6
206 WMKD7
207 TCK
208 GNDI
PRV-LX10
2
3
Pin Function
I
656 video data of VAIKILT output
−
+2.5V
−
+3.3V
−
GND
O
656 video data for water mark
O
656 video data for water mark
O
656 video data for water mark
O
656 video data for water mark
656 video data for water mark (LED port
O
for operation check)
656 video data for water mark (LED port
O
for operation check)
656 video data for water mark (LED port
O
for operation check)
656 video data for water mark (LED port
O
for operation check)
−
Not used
−
Connect to +3.3V
3
4
4