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Schematic Diagrams
M.2 3G + M.2 SATA
D
SATA_TXP5
SATA_TXN5
SATA_RXN5
SATA_RXP5
Sheet 43 of 72
M.2 3G + M.2 SATA
C
32
SATA_TXP5
32
SATA_TXN5
32
32
B
A
B - 44 M.2 3G + M.2 SATA
5
4
M.2 SATA re-driver
37
3.3VS
R391
*0_04
R403
0_04
C578
C577
C552
0.01u_16V_X7R_04
0.1u_16V_Y5V_04
1u_6.3V_X5R_04
R431
4.7K_04
PIN6
PIN10
PIN16
U20
7
EN
mSATA_TXP5
C554
0.01u_16V_X7R_04
1
15
RX1P
TX1P
2
14
mSATA_TXN5
C558
0.01u_16V_X7R_04
RX1N
TX1N
HOST
DEVICE
mSATA_RXN5
C561
0.01u_16V_X7R_04
4
12
TX2N
RX2N
5
11
mSATA_RXP5
C570
0.01u_16V_X7R_04
TX2P
RX2P
Note:
Close to Re-driver IC
ASM1466_new
R432
*100K_04
R400
*100K_04
3.3VS
R402
*100K_04
R401
*100K_04
R433
*100K_04
D03
R388
*0_04
D03
R440
*0_04
R389
*0_04
R390
*0_04
R441
2K_1%_04
R383
*0_04
R384
*0_04
R416
*0_04
3G_CONFIG1
R762
*0_04
Rsvd. for ASM1467
Rsvd. for ASM1467 Mode Select
1: PCI Express Redriver
R420
0_04
0: SATA Redriver
ASM1467 is SATA and PCIe NGFF Redriver
SATA_TXP5
SATA_TXN5
SATA_RXN5
co-lay,
0.2mm)
SATA_RXN5
SATA_RXP5
SATA_RXP5
5
4
3
3.3VS
3G CARD / M.2 SATA
R761
SATA5_GPIO49
SATA5_GPIO49
*10K_04
H: SATA
G
3G_CONFIG1
J_3G1
L: PCIe
Q47
*2SK3018S3
75
40
3G_CONFIG2
CONFIG_2
73
GND10
71
40
3G_CONFIG1
GND9
3G_CONFIG1
69
CONFIG_1
67
48
3G_RST#
Reset#(O)1.8V
65
ANTCTL3(I)1.8V
CHECK BIOS & EC, 1.8V LEVEL
C868
63
ANTCTL2(I)1.8V
61
ANTCTL1(I)1.8V
CLOSED
*33p_50V_NPO_04
59
ANTCTL0(I)1.8V
CONNECTOR
57
GND8
55
40
CLK_PCIE_3G
REFCLKP
GND
53
40
CLK_PCIE_3G#
REFCLKN
51
GND7
C553
0.01u_16V_X7R_04
49
PETp0/SATA-A+
47
C555
0.01u_16V_X7R_04
PETn0/SATA-A-
45
GND6
C565
0.01u_16V_X7R_04
43
PERp0/SATA-B-
C572
0.01u_16V_X7R_04
41
PERn0/SATA-B+
39
GND5
37
Note:
PETp1/USB3.0-Tx+/SSIC-TxP
35
PETn1/USB3.0-Tx-/SSIC-TxN
Close to Re-driver IC
33
GND4
31
PERp1/USB3.0-Rx+/SSIC-RxP
29
PERn1/USB3.0-Rx-/SSIC-RxN
27
GND3
BODYSAR_N
25
GPIO_12(IO)1.8V
3G_W AKE#
23
GPIO_11(IO)1.8V
21
3.3VS
40
3G_CONFIG0
CONFIG_0
11
GND2
9
36
USB_PN6
USB_D-
7
SMB_DATA
9,10,11,12,33,45,50
36
USB_PP6
USB_D+
5
SMB_CLK
9,10,11,12,33,45,50
GND1
3
3.3VS
GND0
1
37
3G_CONFIG3
CONFIG_3
NFSB0-S6701-TP40
P/N = 6-21-84K50-075
GND
PCB Footprint = NXSB0-S67XX-XX40
PCB Footprint
3G POWER
R785
3.3VS
R786
WLAN PIN6
Rd,Re
,
Rd
R443
Re
R447
Qa, Qb, Ra, Rb, Rc, Ca
>120 mil
3.3V
Ca
C603
1u_6.3V_X5R_04
C880
1u_6.3V_X5R_04
Rb
R459
100K_04
3G_POW EREN
48
3G_POW EREN
5VS
13,15,16,17,32,35,45,46,47,49,50,51,54,57
3.3VS
3,9,10,11,12,13,14,15,16,17,32,33,34,35,37,38,39,40,41,44,45,46,48,49,50,51,54,57
5V
41,45,49,51,52,54,55,58,59,60
3.3V
2,3,13,30,32,41,42,44,45,49,50,51,52,54,55,58,59,60
3
2
1
CURRENT2A
,DON'T DROP BELOW 3.135V
3G_3.3V
80 mils
C850
220u_6.3V_6.3*6.3*4.2
74
C516
0.1u_16V_Y5V_04
3.3V4
72
3.3V3
70
C520
0.1u_16V_Y5V_04
3.3V2
68
R1296
*80.6_1%_04
SUSCLK(32Khz)(O)
66
SIM Detect(O)
64
COEX1(I/O)1.8V
62
C529
HUAWEI MU736
COEX2(I/O)1.8V
60
HI: Present
COEX3(I/O)1.8V
CONNECTOR
58
470p_50V_X7R_04
NC1
56
NC0
54
PEWake#(IO)
52
GND
HIGH,
CLKREQ#(IO)
50
PERST#(O)
48
R407
*10K_04
3.3V
GPIO_4(IO)1.8V
46
GPIO_3(IO)1.8V
44
3G_CLKREQ#
40
GPIO_2(IO)1.8V
42
GPIO_1(IO)1.8V
40
GPIO_0(IO)1.8V
38
DEVSLP(O)
36
UIM_PW R
UIM_PWR(I)
34
UIM_DATA
UIM_DATA(IO)
UIM_DATA
51
UIM_CLK
32
C576
UIM_CLK(I)
UIM_CLK
51
UIM_RST
30
UIM_RESET(I)
UIM_RST
51
28
0.1u_16V_Y5V_04
GPIO_8(IO)1.8V
26
GPS_DISABLE#
R430
0_04
GPIO_10(IO)1.8V
24
GPIO_7(IO)1.8V
22
GND
GPIO_6(IO)1.8V
20
GND
GPIO_5(IO)1.8V
B KEY
HUAWEI MU736
10
GPIO_9/DAS/DSS#(I)(OD)
8
W_DISABLE#1(O)
PW R_ON_OFF
6
R445
10K_04
Full_Card_Power_Off#(O)1.8V
4
3.3V1
80 mils
2
3.3V0
+
C849
C881
C879
220u_6.3V_6.3*6.3*4.2
10u_6.3V_X5R_06
0.1u_16V_Y5V_04
Connector
GND
GND
GND
Default
3G_POW EREN
Windows 8 3G_POWEREN
Always hi.
R464
*0_06
*0_06
*100_06
PW R_ON_OFF
*0_06
*0_06
R463
3G_3.3V
*12K_06
>120 mil
S
D
Qb
Q33
AO3415
C608
GND
0.1u_16V_Y5V_04
Rc
Ra
R466
R465
20K_1%_04
10_06
ADD Ra, Qa Solution For PDA BUG:
When Battery discharge to shutdown,
D
the CMOS sometimes loss.
D
Qa
5
G
Q34B
2
G
Q34A
S
MTDK5S6R
S
MTDK5S6R
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[43] M.2 3G + M.2 SATA
[43] M.2 3G + M.2 SATA
[43] M.2 3G + M.2 SATA
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P6500-D03
6-71-P6500-D03
6-71-P6500-D03
A3
A3
A3
P650SE
P650SE
P650SE
Date:
Date:
Date:
Monday, August 18, 2014
Monday, August 18, 2014
Monday, August 18, 2014
Sheet
Sheet
Sheet
2
1
GND
D
SUS_CLK
34,44
PIN
1.8V LEVEL
NORMAL CLOSED(
GND)
PULL
PULL HIGH
UIM_PW R
51
3.3V
C
3G_EN
48
3G_3.3V
B
A
Rev
Rev
Rev
D03
D03
D03
43
43
43
of
of
of
77
77
77
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