Comtech EF Data Radyne DMD1050 Installation And Operation Manual page 25

DMD1050 Satellite Modem Board
FPGA. There is no limit to the number of digital logic configurations available to the FPGA,
aside from the amount of Flash memory available to the system microprocessor for storage of
configuration files.
The DMD1050 Baseband Processing Printed Circuit Card provides a flexible architecture that
allows many different modes of terrestrial and satellite framing, various FEC options, digital
voice processing, and several different modulation/demodulation formats. Also included on the
Baseband Printed Circuit Card is a MIL-188-114A/RS-422 synchronous interfaces and a two port
10/100 Ethernet Bridge interface.
A block diagram of the Baseband Processing Card is shown in Figure 3-3.
Ethernet
Terminal
RLLP
Fault
(DB9)
Analog I Unfilter
Alias
Analog I Inv Unfilter Filter
Analog Q Unfilter
Alias
Analog Q Inv Unfilter Filter
Analog I Unfilter
Alias
Analog I Inv Unfilter
Filter
Analog Q Unfilter
Alias
Analog Q Inv Unfilter Filter
Figure 3-3. DMD1050 Baseband Processing Card Block Diagram
MN-DMD1050
Revision 9
Ethernet
PHY
Relays
AGC DAC
SPI Bus
SCT
Analog I Filter
ADC I
Analog I Inv Filter
Analog Q Filter
ADC Q
Analog Q Inv Filter
Buffers Terrestrial Data
Buffers
Terrestrial Data
Mem Space DMA
Insert DSP
Mem Space DMA
Buffers
Terrestrial Data
Analog I Filter
I
ADC
Analog I Inv Filter
Analog Q Filter
ADC Q
Analog Q Inv Filter
I/Q
2 x
r2r
TP
25 MHz
Xtal
SPI Bus
Serial
ADC
EEPROM
Tx
R2R LPF DAC
LPF
Clk
Modulator
FPGA
Buffers
40 MHz
Drop DSP
TPC Codec
40 MHz
Buf
Buffers
SRAM
SCT
R2R
LPF
Demodulator
FPGA
Theory of Operation
Compact
Flash
PCMCIA
SCC2
Controller
SMC2
SCC3
Battery
GPIO
Xtal
SPI
10 Mhz
uProc
OCXO
Bus
40
PLL
MHz
x2
Boot
Flash
8 Mbx8
SDRAM
2 x
256 Mbx16
80 MHz
3–3