Advantech AIMB-215 User Manual page 68

Intel celeron j1900/n2930/ n2807 mini-itx with vga/lvds/ dp++ (edp), 6 com, dual lan, 10 usb, 2 mini-pcie, and pcie x1
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Restore PCIE Registers
On non-PCI Express aware OS (pre-Windows Vista), some devices may not be
correctly re-initialized after S3. Enabling this item restores PCI Express device
configurations upon S3 resume. Warning: Enabling this item can cause issues
with other hardware after S3 resume.
PCI Express GEN2 Device Register Settings
Completion Timeout
This item is an in-device function that supports Completion Timeout program-
mability by allowing the system software to modify the Completion Timeout
value. The default value is 50us to 50ms. If the "Shorter" option is selected, the
software will use the shorter timeout ranges supported by the hardware. If the
"Longer" option is selected, the software will use longer timeout ranges.
ARI Forwarding
If supported by the hardware and set to "Enabled", the downstream port pre-
vents the traditional device number field from being 0 enforcement when turning
a Type 1 Configuration Request into a Type 0 Configuration Request, thereby
permitting access to the extended functions of the ARI device located below the
port. The default value is "Disabled".
AtomicOp Requester Enable
If supported by the hardware and set to "Enabled", this function initiates Atomi-
cOp requests only if the Bus Master Enable bit is in the Command Register Set.
AtomicOp Egress Blocking
If supported by the hardware and set to "Enabled", outbound AtomicOp
requests transmitted via egress ports will be blocked.
IDO Request Enable
If supported by the hardware and set to "Enabled", this item allows users to set
the number of ID-based ordering (IDO) bit (Attribute[2]) requests to be initiated.
IDO Completion Enable
If supported by the hardware and set to "Enabled", this item allows users to set
the number of IDO bit (Attribute[2]) requests to be initiated.
AIMB-215 User Manual
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