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Each pinned-photodiode pixel uses a 5-transistor ('5T' design), facilitating correlated double sampling
(CDS) and a lateral anti-blooming drain. Using this architecture, non-linearity is less than 1%.
5.4 Sensor Mount and Heat Sink
The sensor mount is used to align the lens assemblies to the camera focal plane using precision alignment
pins and to mount and heat-sink the camera to the customer's assembly. The camera sensor is mounted to
the sensor mount plate. The sensor mount aligns the sensor to the precision alignment pins.
The sensor mount is also designed to be the mounting point for the camera to the customer's assembly.
The sensor mount should be clamped into place with good thermal contact between the sensor mount
plate and the customer's assembly. Care should be taken to maintain the case operating temperatures in
accordance with the camera specifications.
Heavy optical assemblies (focal length greater than 75mm) or other assemblies should not use the lens
mounting assembly without additional lens supports. The sensor mount also includes a tapped ¼-20
tripod adapter mounting hole, and the tripod adapter can be procured from FLIR.
See section 7 for the mechanical mounting information and section 8 for camera mounting & cooling
information.
5.5 Camera Electronics
The camera electronics includes four major subassemblies:
Sensor Bias and Interface
Clock and Control Circuitry
Power Conditioning and Distribution
Camera Interface
5.5.1 Sensor Bias and Interface
The sensor bias and interface circuits are used to provide the necessary bias controls to the camera sensor,
provide the necessary sensor timing signals, monitor sensor health and temperature, and to get the raw
sensor data from the sensor to the back-end electronics for image processing.
5.5.2 Clock and Control Circuitry
All camera control and image processing takes place in the clock and control circuitry. This circuitry
contains the FPGA that performs timing and control of the imaging sensor, image processing functions,
and memory for storing camera specific information and to support image processing.
5.5.3 Power Conditioning and Distribution
The power conditioning and distribution circuitry converts the single power input to a variety of internal
voltages to support image sensor biasing, logic biasing and external camera interface requirements. This
circuitry may also perform thermal electric cooler (TEC) control if your camera is equipped.
10-10032-01
Rev A1
2011 FLIR Advanced Imaging Systems
Tau CNV Camera User's Manual
ECO: 594
page 17 of 49
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