The Power7+ Processor; Multi-Core And Multi-Thread Scalability - IBM Power7 Optimization And Tuning Manual

128-entry count cache
128-entry branch target address cache
Aggressive out-of-order execution
Two symmetric fixed-point execution units
Two symmetric load/store units, which can also run simple fixed-point instructions
An integrated, multi-pipeline vector-scalar floating point unit for running both scalar and
SIMD-type instructions, including the VMX instruction set and the new Vector Scalar
eXtension (VSX) instruction set, and capable of up to eight flops per cycle
Hardware data prefetching with 12 independent data streams and software control
Hardware DFP capability
Adaptive power management
The POWER7 processor is designed for system offerings from 16-core blades to 256-core
drawers. It incorporates a dual-scope broadcast coherence protocol over local and global
SMP links to provide superior scaling attributes.
For more information about this topic, see 2.4, "Related publications" on page 51.

2.1.1 The POWER7+ processor

The POWER7+ is the same POWER7 processor core with new technology, including more
on-chip accelerators and an additional L3 cache. There are no new instructions in POWER7+
over POWER7. The differences in POWER7+ are:
Manufactured with 32-nm technology
A 10 MB L3 cache per core
On-chip encryption accelerators
On-chip compression accelerators
On-chip random number generators

2.2 Multi-core and multi-thread scalability

POWER7 Systems advancements in multi-core and multi-thread scaling are significant. A
significant POWER7 performance opportunity comes from parallelizing workloads to enable
the full potential of the Power platform. Application scaling is influenced by both multi-core
and multi-thread technology in POWER7 processors. A single POWER7 chip can contain up
to eight cores. With SMT, each POWER7 core can present four hardware threads. SMT is the
ability of a single physical processor core to simultaneously dispatch instructions from more
than one hardware thread context. Because there are multiple hardware threads per physical
processor core, additional instructions can run at the same time. SMT is primarily beneficial in
commercial environments where the speed of an individual transaction is not as important as
the total number of transactions performed. SMT is expected to increase the throughput of
workloads with large or frequently changing working sets, such as database servers and
web servers.
Chapter 2. The POWER7 processor
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