IBM Power7 Optimization And Tuning Manual page 78

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What the SPPL option does on a Power 795 system
A new option named Shared Partition Processor Limit (SPPL) is added to give hints to the
hypervisor about whether to contain partitions to minimum domains or to spread partitions
across multiple domains. On Power 795, a book can host four chips that total up to 32 cores.
If SPPL is set to 32, then the maximum size of an LPAR that can be supported is 32 cores.
This hint enables hypervisor to allocate both physical cores and memory of an LPAR within a
single domain as much as possible. For example, in a three-book configuration, if the wanted
configuration is four LPARs, each with 24 cores, three of those LPARs are contained in each
of the three books, and the fourth LPAR is spread across three books.
If SPPL is set to MAX, then a partition size can exceed 32 cores. This hint helps hypervisor to
maximize the interconnect bandwidth allocation by spreading LPARs across more domains
for larger size LPARs.
SPPL value: The SPPL value can be set on only Power 795 systems that contain four or
more processing books. If there are three or less processor books, the SPPL setting is
controlled by the system and is set to 32 or 24, based on the number of processors
per book.
On a Power 795 system, where the SPPL value is set to MAX, there is a way to configure
individual partitions so they are still packed into a minimum number of books. This setup is
achieved by using the HMC command-line interface (CLI) through the lpar_placement profile
attribute on the chsyscfg command. Specifying a value of lpar_placement=1 indicates that
the hypervisor attempts to minimize the number of domains that are assigned to the LPAR.
Setting lpar_placement=0 is the default setting, and follows the existing rules when SPPL is
set to MAX.
How to determine if an LPAR is contained within a domain
From an AIX LPAR, run lssrad to display the number of domains across which an LPAR
is spread.
The lssrad syntax is:
lssrad -av
If all the cores and memory are in a single domain, you should receive the
following output with only one entry under REF1:
REF1 SRAD
0
0
1
REF1 represents a domain, and domains vary by platform. SRAD always references a chip.
However, lssrad does not report the actual physical domain or chip location of the partition: it
is a relative value whose purpose is to inform if the resources of the partition are within the
same domain or chip. The output of this lssrad example indicates that the LPAR is allocated
with 16 cores from two chips within the same domain. Note that the lssrad command output
was taken from an SMT4 platform, and thuse CPU 0-31 actually represents 8 cores.
When all the resources are free (an initial machine state or reboot of the CEC), the PowerVM
allocates memory and cores as optimally as possible. At partition boot time, PowerVM is
aware of all of the LPAR configurations, so placement of processors and memory are made
regardless of the order of activation of the LPARs.
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POWER7 and POWER7+ Optimization and Tuning Guide
MEM
CPU
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