IBM Power7 Optimization And Tuning Manual page 14

Yaakov Yaari is a research scientist at Haifa Research Lab, Israel. He has 30 years of
experience in program simulation, computer architecture, and in the compiler and program
optimization fields. He holds a Ph.D. degree in Mathematics from Bar Ilan University, and
Bachelor of Science and Master of Science degrees in Electrical Engineering from
Technion, Haifa. His areas of expertise include program optimization, machine learning,
and computer architecture. He has published several papers in these areas and holds
several patents.
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POWER7 and POWER7+ Optimization and Tuning Guide
Randy Swanberg is a Distinguished Engineer in IBM Power
Systems Software and is one of the principal AIX architects. After
beginning his career working on defense navigation systems for the
US Army, he joined IBM in 1989 and worked on several operating
system projects, including AIX, OSF, Project Monterey, and Linux.
Most of his 23 years with IBM have been working with the AIX core
kernel, specializing in processor and hardware bring-up, memory
management, and virtualization. Randy has architectural
responsibility for AIX support and usage of hardware systems,
features, and new technologies. He is also a member of the
POWER processor Architecture Control Board.
Brian Twichell is a Senior Technical Staff Member at the IBM
development lab in Austin, Texas. He has over 25 years of
experience in systems performance, including over 20 years with
Power Systems, where he contributed in roles spanning research,
development, and pre-sales and post-sales support. He holds
Bachelor's and Master's degrees in Computer Science from Purdue
University and the University of Texas at Austin, respectively.
Brian F Veale is a Senior Software Engineer in Power Systems
Software and an AIX architect. He holds a PhD in Computer
Science from the University of Oklahoma, where he was a
Graduate Assistance in Areas of National Need (GAANN) Fellow,
and a lecturer, teaching courses in Computer Science and
Electrical and Computer Engineering. Before obtaining his PhD,
Brian worked on training simulators for the US Air Force. At IBM, he
works on the AIX core kernel, specializing in support and usage of
new processor features and hardware systems. He is a Senior
Member of the Institute of Electrical and Electronics Engineers
(IEEE) and a member of the POWER processor Architecture
Control Board.
Julian Wang is the technical lead of JIT compiler and Java
performance on Power Systems, and has been developing compiler
and runtime products for the past 17 years. Julian has a passion for
making Java perform better on the Power Architecture, and he has
acute interests in parallel computing, operating systems,
performance analysis, and bit-twiddling.