Internal I/O Subsystem - IBM Power 750 Technical Overview And Introduction

Table 2-10 External GX++ I/O bandwidth
Processor card
Power 760
3.416 GHz
3.136 GHz
Power 750
4.060 GHz
3.500 GHz
Total (External I/O)
Bandwidth: Technically, all the other interfaces, such as daughter card, asynchronous
port, DVD, USB, and the PCI Express slots are connected to two other internal GX++ ports
through two P7IOC chipsets. So, theoretically, if all the ports, devices, and PCIe slots are
considered, the total I/O bandwidth for a system is 80 GBps.

2.6 Internal I/O subsystem

The internal I/O subsystem resides on the I/O planar, which supports six PCIe slots. All PCIe
slots are hot-pluggable and enabled with Enhanced Error Handling (EEH). In the unlikely
event of a problem, EEH-enabled adapters respond to a special data packet that is generated
from the affected PCIe slot hardware by calling system firmware, which examines the affected
bus, allows the device driver to reset it, and continues without a system reboot. For more
information about RAS on the I/O buses, see Chapter 4, "Continuous availability and
manageability" on page 149.
The I/O backplane contains two I/O controllers for enhanced I/O redundancy and flexibility.
PCIe slots 1 - 4 are connected to I/O controller A. The I/O controller B connects to PCIe slots
5 - 6, the multifunction card, and to the DVD-RAM drive.
Table 2-11 lists the slot configuration of the Power 750 and Power 760.
Table 2-11 Slot configuration of the Power 750 and Power 760
Slot
number
Slot 1
Slot 2
Slot 3
Slot 4
Slot 5
Slot 6
Slot 7
Slot 8
Slot description
CPU Socket 1(DCM1)
GX bus 1
CPU Socket 1(DCM1)
GX bus 0
Description Location
code
PCIe Gen2 x8 P2-C1
PCIe Gen2 x8 P2-C2
PCIe Gen2 x8 P2-C3
PCIe Gen2 x8 P2-C4
PCIe Gen2 x8 P2-C5
PCIe Gen2 x8 P2-C6
GX++ P1-C2
GX++ P1-C3
Frequency GX++ Bandwidth
(maximum theoretical)
2.5 GHz 20 GBps
2.5 GHz 20 GBps
40 GBps
PCI host bridge
(PHB)
P7IOC A PCIe PHB5
P7IOC A PCIe PHB4
P7IOC A PCIe PHB3
P7IOC A PCIe PHB2
P7IOC B PCIe PHB5
P7IOC B PCIe PHB4
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Chapter 2. Architecture and technical overview
Maximum card
size
Full length
Full length
Full length
Full length
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Full length
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