Specifications
2.4 AC Electrical Characteristics
The timing waveforms shown in the AC electrical characteristics section are tested with a V
and a V
minimum of 2.4 V for all pins except EXTAL, which is tested using the input levels shown in Note 6 of
IH
Table 2-2. AC timing specifications, which are referenced to a device input signal, are measured in production with
respect to the 50 percent point of the respective input signal's transition. DSP56311 output levels are measured
with the production test machine V
Note: Although the minimum value for the frequency of EXTAL is 0 MHz, the device AC test conditions are 15
MHz and rated speed.
2.4.1
Internal Clocks
Characteristics
Internal operation frequency with PLL
enabled
Internal operation frequency with PLL
disabled
Internal clock high period
•
With PLL disabled
With PLL enabled and MF ≤ 4
•
•
With PLL enabled and MF > 4
Internal clock low period
•
With PLL disabled
•
With PLL enabled and
MF ≤ 4
•
With PLL enabled and
MF > 4
Internal clock cycle time with PLL enabled
Internal clock cycle time with PLL disabled
Instruction cycle time
Notes:
1.
DF = Division Factor; Ef = External frequency; ET
PDF = Predivision Factor; T
2.
See the PLL and Clock Generation section in the DSP56300 Family Manual for a details on the PLL.
2-4
and V
reference levels set at 0.4 V and 2.4 V, respectively.
OL
OH
Table 2-4.
Internal Clocks
Symbol
Min
f
—
f
—
T
—
H
0.49 × ET
PDF × DF/MF
0.47 × ET
PDF × DF/MF
T
—
L
0.49 × ET
PDF × DF/MF
0.47 × ET
PDF × DF/MF
T
—
C
T
—
C
I
—
CYC
= External clock cycle; MF = Multiplication Factor;
C
= internal clock cycle.
C
DSP56311 Technical Data, Rev. 8
Expression
Typ
(Ef × MF)/
(PDF × DF)
Ef/2
ET
C
×
—
C
×
—
C
ET
C
×
—
C
×
—
C
× PDF ×
ET
C
DF/MF
2 × ET
C
T
C
maximum of 0.3 V
IL
Max
—
—
—
0.51 × ET
×
C
PDF × DF/MF
0.53 × ET
×
C
PDF × DF/MF
—
0.51 × ET
×
C
PDF × DF/MF
0.53 × ET
×
C
PDF × DF/MF
—
—
—
Freescale Semiconductor