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Data Sheet Conventions .......................................................................................................................................ii
Features...............................................................................................................................................................iii
Target Applications ............................................................................................................................................. iv
Product Documentation ......................................................................................................................................iv
Chapter 1
1.1
Power ................................................................................................................................................................1-3
1.2
Ground ..............................................................................................................................................................1-3
1.3
Clock.................................................................................................................................................................1-3
1.5
External Memory Expansion Port (Port A) ......................................................................................................1-4
1.6
Interrupt and Mode Control ..............................................................................................................................1-7
1.7
Host Interface (HI08)........................................................................................................................................1-8
1.8
Enhanced Synchronous Serial Interface 0 (ESSI0) ........................................................................................1-11
1.9
Enhanced Synchronous Serial Interface 1 (ESSI1) ........................................................................................1-12
1.10
Serial Communication Interface (SCI) ...........................................................................................................1-13
1.11
Timers .............................................................................................................................................................1-14
1.12
JTAG and OnCE Interface ..............................................................................................................................1-15
2.1
Maximum Ratings.............................................................................................................................................2-1
2.2
Thermal Characteristics ....................................................................................................................................2-2
2.3
DC Electrical Characteristics............................................................................................................................2-3
2.4
AC Electrical Characteristics............................................................................................................................2-4
3.1
Package Description .........................................................................................................................................3-2
3.2
MAP-BGA Package Mechanical Drawing .....................................................................................................3-10
Chapter 4
4.1
Thermal Design Considerations........................................................................................................................4-1
4.2
Electrical Design Considerations......................................................................................................................4-2
4.3
Power Consumption Considerations.................................................................................................................4-3
4.4
PLL Performance Issues ...................................................................................................................................4-4
4.5
Input (EXTAL) Jitter Requirements .................................................................................................................4-6
Appendix A
Power Consumption Benchmark
Data Sheet Conventions
OVERBAR
Indicates a signal that is active when pulled low (For example, the
low.)
"asserted"
Means that a high true (active high) signal is high or that a low true (active low) signal is low
"deasserted"
Means that a high true (active high) signal is low or that a low true (active low) signal is high
Examples:
Signal/Symbol
Note: Values for
,
V
V
IL
ii
Logic State
PIN
True
PIN
False
PIN
True
PIN
False
,
, and
are defined by individual product specifications.
V
V
OL
IH
OH
DSP56311 Technical Data, Rev. 8
pin is active when
RESET
Signal State
Asserted
Deasserted
Asserted
Deasserted
Freescale Semiconductor
Voltage
V
/V
IL
OL
V
/V
IH
OH
V
/V
IH
OH
V
/V
IL
OL
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