Printhead Drive Circuit; Communication Sequence - Ithaca 75 User Manual

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Appendix B: Theory of Operation
The data from the interface is input through the connector (CN1), and the
interface LSI (Q4: M6990) latches this input data in sync with the /STB signal.
The BUSY signal is on during processing of this data. When the processing is
completed, the BUSY signal is turned off, and an /ACK signal is sent to request
more data.
Serial Interface
Serial Option #1 has its own 8051 processor and memory and converts the
serial input data stream to parallel form. This data is input to the main control
board in the same manner as the parallel interface, except that the data enters
through CN2 instead of CN1 on the Control Board.
With a Serial Option #2 board installed, the ISEL signal goes low, and the
interface LSI changes the I/O port to the serial interface(CN2).
Serial data from the Serial Interface Board is input through pin 33 (NSTB) of
the LSI (Q4). This data is output from pin 44 (NRXD) via the internal latch,
and is sent to serial port pin 10 (RXD) of the microprocessor (Q12).
Serial output data is sent directly from pin 11 (TXD) of the microprocessor.

PRINTHEAD DRIVE CIRCUIT

Figure 51: Communication Sequence of the Printhead Drive Circuit
This circuit drives the head magnets corresponding to the HEAD DATA1 to 9
signals in accordance with the HEAD-ON signal. This makes the print head
print characters.
When the HEAD-ON signal goes high, the RC integrator (R157, and C158 or
C55) determines the head drive time. The integrator lengthens the drive time if
the drive voltage (+30) lowers, and shortens the drive time if the voltage rises.
This maintains consistent print wire impact force.