Analog Devices AD9249 User Manual page 16

Format is set to the correct encoding (twos complement by default). Check that the Number
Format in the VisualAnalog Input Formatter matches the data format selected in the
SPIController ADCBase0 OUTPUT MODE(14) window. Repeat for the other channels.
If the FFT appears normal but the performance is poor, check the following:
Make sure that an appropriate filter is used on the analog input.
Make sure that the signal generators for the clock and the analog input are clean (low phase noise).
Change the analog input frequency slightly if noncoherent sampling is being used.
Make sure that the SPI configuration file matches the product being evaluated.
If the FFT window remains blank after Run in VisualAnalog (see Figure 12) is clicked, do the following:
Make sure that the evaluation board is securely connected to the
Make sure that the correct FPGA program was installed by clicking the Settings icon in the ADC
Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA
.mcs file (one containing "AD9249" in the filename) is selected for the part.
Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on
the HSC-ADC-EVALDZ
Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA
.mcs file (one containing "AD9249" in the filename) is selected for the part. Then push the Program
button. The LED should light up.
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board. If the DONE LED is not illuminated, click the Settings icon in the ADC
Rev 13 Nov 2013 01:51 | Page 16
HSC-ADC-EVALDZ board.
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