• FRONT CPU (LOGIC UNIT: IC101)
Pin
Line
No.
Name
TFT contrast control. (D/A)
1
CNTV
(1–2.3 V)
POWER LED control.
2
PWRD
(0 V=Light OFF, 3.3 V=Light ON.)
3
LDAT
Expander (BU2099) data.
4
LST
Expander (BU2099) strobe.
5
RTCCK Expander (BU2099) clock.
8
RTCCE Clock IC (RX-4581) chip enable.
9
MOND
[MONITOR] LED control signal.
16
RTCIRQ Clock IC (RX-4581) interlude control.
19
RSB
RIT dial (24x4 pulses) phase-B input.
20
RSA
RIT dial (24x4 pulses) phase-A input.
21
MSB
Main dial (250x4 pulses) phase-B input.
22
MSA
Main dial (250x4 pulses) phase-A input.
Timer LED control.
23
TMD
H=Light ON.
24
LEDV
LED brightness control. (PWM, 600 Hz)
LCD backlight ON/OFF.
25
BKLS
H=Backlight ON.
CFL backlight brightness control. (PWM, 600
26
CFLV
Hz)
Headphone connection detect.
28
PHNI
H=Connection detected.
29
DTXD
Falsh read data.
30
DRXD
Flash write data.
Flash write clock.
31
SLOS
H=While writing.
32
DBP1
Flash write "BUSY."
Data output (UART) for the communication
33
LTXD
with main CPU.
Data input (UART) for the communication with
34
LRXD
main CPU.
35
DOTK
Ele-key input. (Dot)
36
DSHK
Ele-key input. (Dash)
Squelch signal to the [MICROPHONE JACK].
37
SQSS
H=Squelch open.
38
RTCDT Clock IC (RX-4581) data.
40
TRAK
[TRANSMIT] input. (Pull-up)
41
F1K
[F-1] input. (Pull-up)
42
F2K
[F-2] input. (Pull-up)
43
F3K
[F-3] input. (Pull-up)
44
LOE
Expander (BU2099) output enable.
45
F4K
[F-4] input. (Pull-up)
46
F5K
[F-5] input. (Pull-up)
47
F6K
[F-6] input. (Pull-up)
49
SSBK
[SSB] input. (Pull-up)
50
CWK
[CW] input. (Pull-up)
51
RTYK
[RTTY/PSK] input. (Pull-up)
52
AMK
[AM/FM] input. (Pull-up)
53
FILK
[FILTER] input. (Pull-up)
55
EXTK
[EXIT/SET] input. (Pull-up)
56
PLYK
[PLAY key input. (Pull-up)
57
RECK
[REC] input. (Pull-up)
58
XFCK
[XFC] input. (Pull-up)
65
MPRK
[MP-R] input. (Pull-up)
66
MWK
[MW] input. (Pull-up)
67
UPK
[
] input. (Pull-up)
Description
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
O
Pin
Line
No.
Name
68
DWK
[
] input. (Pull-up)
69
MPWK
[MP-W] input. (Pull-up)
70
VMK
[V/M] input. (Pull-up)
71
ATK
[AUTO TUNE] input. (Pull-up)
72
TSK
[TS] input. (Pull-up)
73
PWRK
[POWER] input. (Pull-up)
Analog circuit control signal.
76
FPWRS
H=Transceiver power ON.
83,
PB2B,
Input ports for [PBT2] (outer control).
I
84
PB2A
I
85,
PB1B,
Input ports for [PBT1] (inner control).
86
PB1A
I
Logic circuits reset signal.
I
87 LG_RES
H=Reset.
I
LG_
Logic circuits power control signal.
88
PWR
H=Transceiver power ON.
89
MUDL
[MIC GAIN] input. (A/D)
Voltage from the analog SW (CD4501). (A/D)
90
AS4
(0–3.3 V)
Voltage from the analog SW (CD4501). (A/D)
91
AS3
(0–3.3 V)
Voltage from the analog SW (CD4501). (A/D)
93
AS1
(0–3.3 V)
I
98
ASL2
Analog SW (CD4501) control signal.
99
ASL1
Analog SW (CD4501) control signal.
I
100
ASL0
Analog SW (CD4501) control signal.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
3 - 10
Description
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
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