Analog Devices EVAL-AD1974AZ User Manual
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Analog Devices EVAL-AD1974AZ User Manual

Analog Devices EVAL-AD1974AZ User Manual

Evaluating the ad1974 four adc with pll 192 khz, 24-bit codec
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One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD1974 Four ADC with PLL 192 kHz, 24-Bit Codec

EVAL-AD1974AZ PACKAGE CONTENTS

AD1974 evaluation board
USBi control interface board
USB cable

OTHER SUPPORTING DOCUMENTATION

AD1974
data sheet

EVALUATION BOARD OVERVIEW

This document explains the design and setup of the evaluation
board for the AD1974. The evaluation board must be connected
to an external ±12 V dc power supply and ground. On-board
regulators derive the 3.3 V supplies for the AD1974. The
AD1974 is controlled through an SPI interface. A small external
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.

FUNCTIONAL BLOCK DIAGRAM

POWER SUPPLY
ADC 1&2
ANALOG
AUDIO
MCLK ROUTING

Evaluation Board User Guide

interface board, EVAL-ADUSB2EBZ (also called USBi),
connects to a PC USB port and provides SPI access to the
evaluation board through a ribbon cable. A graphical user
interface (GUI) program is provided for easy programming of
the chip in a Microsoft® Windows® PC environment. The
evaluation board allows demonstration and performance testing
of most AD1974 features, including the four ADCs, as well as
the digital audio ports.
Additional analog circuitry (ADC input filter/buffer) and
digital interfaces such as S/PDIF are provided to ease product
evaluation.
All analog audio interfaces are accessible with stereo audio
3.5 mm TRS connectors.
CONTROL
SPI
INTERFACE
LRCLK, BCLK, SDATA
AD1974
CLOCK & DATA ROUTING
Figure 1.
Rev. 0 | Page 1 of 32
S/PDIF
INTERFACE
SERIAL AUDIO
INTERFACES
UG-046

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  • Page 1: Eval-Ad1974Az Package Contents

    One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD1974 Four ADC with PLL 192 kHz, 24-Bit Codec EVAL-AD1974AZ PACKAGE CONTENTS interface board, EVAL-ADUSB2EBZ (also called USBi),...

  • Page 2: Table Of Contents

    UG-046 Evaluation Board User Guide TABLE OF CONTENTS EVAL-AD1974AZ Package Contents ..........1 Powering the Board ...............3 Other Supporting Documentation ..........1 Setting Up the Master Clock (MCLK) ........4 Evaluation Board Overview ............1 Configuring the PLL Filter ............5 Functional Block Diagram .............. 1 Connecting Audio Cables ............5...

  • Page 3: Setting Up The Evaluation Board

    Copy the .xml file for the AD1974 from the extraction ADDR0 ADDR1 folder into the C:\Program Files\Analog Devices Inc\AutomatedRegWin folder, if it does not appear in the Figure 2. Standalone Slave Mode folder after installation.

  • Page 4: Setting Up The Master Clock (Mclk)

    UG-046 Evaluation Board User Guide POWER SELECTION 193X_MCLKI DISABLE JP18 JP20 C147 MCLKO XTAL JP19 1938_MCLKI JP22 R160 JP5 JP6 Figure 5. AD1974 Power Jumpers C158 JP23 193X_MCLKO CPLD R167 SETTING UP THE MASTER CLOCK (MCLK) JP25 HDR2 R169 AD1974 evaluation board has a series of jumpers that give JP27 OSC DISABLE...

  • Page 5: Configuring The Pll Filter

    Evaluation Board User Guide UG-046 CONFIGURING THE PLL FILTER The PLL for the AD1974 can run from either MCLK or LRCLK, TP26 according to its setting in the PLL and Clock Control 0 register, IN1L+ IN1L IN1L– Bits[6:5]. The matching RC loop filter must be connected to LF TP28 TP25 (Pin 47) using JP15.
  • Page 6 UG-046 Evaluation Board User Guide As an example, to set the ADC port as master, switch the ADC (see Figure 3); the BCLK and LRCLK signals run from the ADC Control Register 2 bits for BCLK and LRCLK to master and port of the AD1974 to the S/PDIF transmitter and HDR1.

  • Page 7: Rotary And Dip Switch Settings

    Evaluation Board User Guide UG-046 ROTARY AND DIP SWITCH SETTINGS Figure 14. Settings Chart 1 Rev. 0 | Page 7 of 32...
  • Page 8 UG-046 Evaluation Board User Guide Figure 15. Settings Chart 2 Rev. 0 | Page 8 of 32...

  • Page 9: Schematics And Artwork

    Evaluation Board User Guide UG-046 SCHEMATICS AND ARTWORK Figure 16. Board Schematics, Page 1—ADC Buffer Circuits Rev. 0 | Page 9 of 32...
  • Page 10 UG-046 Evaluation Board User Guide Figure 17. Board Schematics, Page 2—Serial Digital Audio Interface Headers with MCLK Direction Switching Rev. 0 | Page 10 of 32...
  • Page 11 Evaluation Board User Guide UG-046 Figure 18. Board Schematics, Page 3—S/PDIF Receive and Transmit Interfaces Rev. 0 | Page 11 of 32...
  • Page 12 UG-046 Evaluation Board User Guide Figure 19. Board Schematics, Page 4—Serial Digital Audio Routing and Control CPLD Rev. 0 | Page 12 of 32...
  • Page 13 Evaluation Board User Guide UG-046 Figure 20. Board Schematic, Page 5—AD1974 with MCLK Selection Jumpers Rev. 0 | Page 13 of 32...
  • Page 14 UG-046 Evaluation Board User Guide Figure 21. Board Schematics, Page 6—Daughter Card Interface, Useful as Test Points Rev. 0 | Page 14 of 32...
  • Page 15 Evaluation Board User Guide UG-046 Figure 22. Board Schematics, Page 7—DAC Buffer Circuits Rev. 0 | Page 15 of 32...
  • Page 16 UG-046 Evaluation Board User Guide Figure 23. Board Schematics, Page 8—SPI Control Interface Rev. 0 | Page 16 of 32...
  • Page 17 Evaluation Board User Guide UG-046 Figure 24. Board Schematics, Page 9—Power Supply Rev. 0 | Page 17 of 32...
  • Page 18 UG-046 Evaluation Board User Guide Figure 25. Top Assembly Layer Rev. 0 | Page 18 of 32...
  • Page 19 Evaluation Board User Guide UG-046 Figure 26. Bottom Assembly Layer Rev. 0 | Page 19 of 32...

  • Page 20: Cpld Code

    UG-046 Evaluation Board User Guide CPLD CODE MODULE IF_Logic TITLE 'AD1974 EVB Input Interface Logic' //=================================================================================== FILE: AD1974_pld_revE.abl REVISION DATE: 04-16-09 (rev-E) REVISION: DESCRIPTION: //=================================================================================== LIBRARY 'MACH'; "INPUTS ---------------------------------------------------------------------------- // AD1974 CODEC pins DSDATA1,DSDATA2 pin 86, 87 istype 'com'; DSDATA3,DSDATA4 pin 91, 92 istype 'com';...
  • Page 21 Evaluation Board User Guide UG-046 BCLK_8416 pin 60 istype 'com'; LRCLK_8416 pin 59 istype 'com'; SOMS_RX,SFSEL1_RX,SFSEL0_RX,RMCKF_RX pin 66,67,64,65 istype 'com'; // S/PDIF Tx CS8404 pins SDATA_8406 pin 50 istype 'com'; BCLK_8406,LRCLK_8406 pin 53, 54 istype 'com'; MCLK_8406 pin 49 istype 'com';...
  • Page 22 UG-046 Evaluation Board User Guide //================================================================================ "MACROS // Switch S3, DIP POSITIONS 6 AND 7 ADC_HDR_NORMAL = ( MODE22 & MODE23); ADC_HDR_DATA2_DATA1 = ( MODE22 & !MODE23); ADC_HDR_TDM = (!MODE22 & MODE23); ADC_HDR_AUX = (!MODE22 & !MODE23); S/PDIF_OUT_MUX = MODE24; // HEX Switch S4 // S4 position 0, DAC_RX_ALL...
  • Page 23 Evaluation Board User Guide UG-046 // S4 position B, DAC_DUAL_TDM ( !MODE14 & MODE13 & !MODE12 & !MODE11); // S4 position C, DAC_HDR1_AUX ( !MODE14 & !MODE13 & MODE12 & MODE11); // S4 position D, ( !MODE14 & !MODE13 & MODE12 &...
  • Page 24 UG-046 Evaluation Board User Guide M3_8414 = 0; // CS8404 Tx interface mode select APMS_TX = 0; // Tx serial port is always slave in this application SFMT1_TX = 0; // Tx data format is I2S always SFMT0_TX = 1; M0_8404 = 0;...
  • Page 25 Evaluation Board User Guide UG-046 HDR1_DSDATA4.oe = (DAC_DUAL_TDM # ADC_HDR_AUX # DAC_HDR1_AUX); HDR1_ASDATA2.oe = (!ADC_HDR_TDM); DBCLK = I_DBCLK; DLRCLK = I_DLRCLK; ABCLK = I_ABCLK; ALRCLK = I_ALRCLK; DSDATA1 = (HDR1_DSDATA1 & (DAC_HDR1_ALL # DAC_HDR1_IND # DAC_RX_2 # DAC_RX_3 # DAC_RX_4 # DAC_HDR1_TDM # DAC_DUAL_TDM # ADC_HDR_AUX)) # (SDATA_8416 &...

  • Page 26: Ordering Information

    UG-046 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 1. Designator Description Manufacturer Part Number C85, C90 to C94, C101 to C103, Multilayer ceramic capacitor, 16 V, X7R Panasonic EC ECJ-0EX1C104K C107, C108, C110, C115, C116, (0402) C121, C127, C132, C134 C2, C5, C8 to C10, C20, C21, C28, Multilayer ceramic capacitor, 50 V, X7R Panasonic EC...
  • Page 27 Evaluation Board User Guide UG-046 Designator Description Manufacturer Part Number R56, R57, R65, R66, R88, R89, R140, Chip resistor, 24.9 Ω, 1%, 100 mW, thick film Rohm MCR03EZPFX24R9 R154, R179, R183, R213, R216, (0603) R228 to R231 C25, C31, C45, C53, C169, C181, Multilayer ceramic capacitor, 50 V, NP0 Rohm MCH185A271JK...
  • Page 28 Description Manufacturer Part Number Crystal, 12.288 MHz, SMT, 10 pF Abracon Corp ABM3B-12.288MHZ-10- 1-U-T Four ADC/eight DAC with PLL, 192 kHz, 24- Analog Devices AD1974YSTZ bit CODEC Microprocessor voltage supervisor Analog Devices ADM811RARTZ-REEL7 Voltage regulator, low dropout Analog Devices ADP3303ARZ-3.3...
  • Page 29 Evaluation Board User Guide UG-046 Designator Description Manufacturer Part Number 110 Ω AES/EBU transformer Scientific SC937-02 Conversion U18, U22 Buffer, three-state, single gate Texas Instruments SN74LVC1G125DRLR Octal, three-state buffer/driver Texas Instruments SN74LVC541ADBR SW2, SW3 SPDT slide switch PC mount E-Switch EG1218 S2, S3 8-position SPST SMD switch, flush, actuated...
  • Page 30 UG-046 Evaluation Board User Guide NOTES Rev. 0 | Page 30 of 32...
  • Page 31 Evaluation Board User Guide UG-046 NOTES Rev. 0 | Page 31 of 32...
  • Page 32 By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement.

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