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ADLINK Technology cPCI-7200 User Manual

Nudaq/nuipc 12mb/s high speed digital input/ output card
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PCI-7200 / cPCI-7200
12MB/S High Speed
Digital Input/ Output Card
User's Guide
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Summary of Contents for ADLINK Technology cPCI-7200

  • Page 1 NuDAQ / NuIPC PCI-7200 / cPCI-7200 12MB/S High Speed Digital Input/ Output Card User’s Guide Recycled Paper...
  • Page 3 ©Copyright 1999~2000 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 2.20: October 14, 2000 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.
  • Page 5 Getting service from ADLINK Customer Satisfaction is always the most important thing for ADLINK Tech Inc. If you need any help or service, please contact us and get it. Web Site http://www.adlink.com.tw http://www.adlinktechnology.com Sales & Service service@adlink.com.tw NuDAQ NuDAM Technical NuIPC Support NuPRO...

  • Page 7: Table Of Contents

    Hardware Installation Outline ... 11 Connector Pin Assignments... 12 2.6.1 PCI-7200 Pin Assignments...12 2.6.2 cPCI-7200 Pin Assignments...14 8254 for Timer Pacer Generation ... 15 Chapter 3 Registers Format ...16 I/O Registers Format... 16 Digital Input Register (BASE + 10) ... 17 Digital Output Register (BASE + 14) ...
  • Page 8 Chapter 5 C/C++ Libraries ...30 Libraries Installation... 30 Programming Guide... 31 5.2.1 Naming Convention ...31 5.2.2 Data Types...31 _7200_Initial... 32 _7200_Switch_Card_No ... 33 _7200_AUX_DI ... 33 _7200_AUX_DI_Channel ... 34 _7200_AUX_DO... 34 _7200_AUX_DO_Channel... 35 _7200_DI ... 35 5.10 _7200_DI_Channel ... 36 5.11 _7200_DO ...

  • Page 10: How To Use This Guide

    How to Use This Guide This manual is designed to help you use the PCI-7200 and cPCI-7200. The functionality of PCI-7200 and cPCI-7200 are the same except that cPCI-7200 has 4 auxiliary digital input and output. Therefore, the “PCI-7200” represents both PCI-7200 and cPCI-7200 if not specified.

  • Page 11: Chapter 1 Introduction

    Introduction The PCI-7200/cPCI-7200 is PCI/CompactPCI form factor high-speed digital I/O card, it consists of 32 digital input channels, and 32 digital output channels. High performance designs and the state-of-the-art technology make this card suitable for high-speed digital input and output applications.

  • Page 12: Features

    On-board 32-byte FIFO for both digital input and output u Extra 8 Kbytes digital input FIFO for cPCI-7200 u 4 auxiliary digital input and output channels (cPCI-7200 only) u Diode terminators for 32 input channels and control signals (cPCI-7200 only) u Multiple interrupt sources are selectable by software 1.3 Specifications...
  • Page 13 PCI-7200: cPCI-7200: Standard 3U CompactPCI form factor l Power Consumption: PCI-7200: cPCI-7200: +5 V @ 820 mA typical one 37-pin D-type and one 40-pin ribbon connector Compact size, only 148mm (L) X 102mm(H) +5 V @ 720 mA typical Introduction 3...

  • Page 14: Software Supporting

    1.4 Software Supporting ADLink provides versatile software drivers and packages for users’ different approach to built-up a system. We not only provide programming library such as DLL for many Windows systems, but also provide drivers for many software package such as LabVIEW ISaGRAF , and so on.

  • Page 15: Dasylab Tm Pro

    1.4.2 PCIS-LVIEW: LabVIEW PCIS-LVIEW contains the VIs, which are used to interface with NI’s LabVIEW software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The ® LabVIEW drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-LVIEW, please refer to the user’s guide in the CD.

  • Page 16: Pcis-Icl: Incontrol T M Driver

    1.4.7 PCIS-ISG: ISaGRAF The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program development environment. The PCIS-ISG includes ADLink products’ target drivers for ISaGRAF under Windows NT environment. The PCIS-ISG is included in the ADLINK CD. It needs license. 1.4.8 PCIS-ICL: InControl PCIS-ICL i s the InControl driver which support the Windows NT.

  • Page 17: Chapter 2 Installation

    In addition to this User's Manual, the package includes the following items: u PCI-7200 Digital I/O & Counter Card u Include ACL-10437: 40-pin to 37-pin D-Sub cable u cPCI-7200 Digital I/O & Counter Module for 3U CompactPCI u Include 100-pin SCSI connector assembly u ADLINK CD...

  • Page 18: Unpacking

    2.2 Unpacking Your PCI-7200 card contains sensitive electronic components that can be easily damaged by static electricity. The card should be done on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat.

  • Page 19: Cpci/Pci-7200'S Layout

    2.4 cPCI/PCI-7200’s Layout Figure 2.1(a) PCI-7200 Layout Diagram Installation 9...
  • Page 20 Figure 2.1(b) cPCI-7200 Layout Diagram 10 Installation...

  • Page 21: Hardware Installation Outline

    2.5 Hardware Installation Outline Hardware configuration The PCI cards (or CompactPCI cards) are equipped with plug and play PCI controller, it can request base addresses and interrupt according to PCI standard. The system BIOS will install the system resource based on the PCI cards’...

  • Page 22: Connector Pin Assignments

    2.6 Connector Pin Assignments 2.6.1 PCI-7200 Pin Assignments The PCI-7200 comes equipped with one 37-pin D-Sub connector (CN2) located on the rear mounting plate and one 40-pin female flat cable header connector (CN1). The CN2 is located on the rear mounting plate; the CN1 is on front of the board.
  • Page 23 DI 0 DI 1 DI 2 DI 3 DI 4 DI 5 DI 6 DI 7 DI 8 DI 9 DI10 DI11 DI12 DI13 DI14 DI15 I_ACK I_REQ Figure 2.3 CN2 Pin Assignments DO10 DO11 DO12 DO13 DO14 DO15 I_TRG Installation 13...

  • Page 24: Cpci-7200 Pin Assignments

    2.6.2 cPCI-7200 Pin Assignments (51) (52) (53) (48) (98) (49) (99) (50) (100) 14 Installation (1) DO0 (26) O_TRG (2) DO2 (27) O_REQ (3) DO4 (28) O_ACK (4) DO6 (29) AUXIN2 (5) DO8 (30) AUXIN3 (6) DO10 (31) +5Vout (7) DO12...

  • Page 25: 8254 For Timer Pacer Generation

    2.7 8254 for Timer Pacer Generation “H” “H” 4MHz Clock “H” The internal timer/counter 8254 on the PCI-7200 is configured as above diagram (figure 2.4). User can use it to generate the timer pacer for both digital input and digital output trigger. The digital input timer pacer is from OUT0 (Timer 0), and the digital output timer pacer is from OUT1 (Timer 1).

  • Page 26: Chapter 3 Registers Format

    Registers Format 3.1 I/O Registers Format The PCI-7200 occupies 8 consecutive 32-bit I/O addresses in the PC I/O address space and the cPCI-7200 occupies 9 consecutive 32-bit I/O addresses. Table 4.1 shows the I/O Map Address Base + 0 Base + 4...

  • Page 27: Digital Input Register (Base + 10)

    3.2 Digital Input Register (BASE + 10) 32 digital input channels can be read from this register Address: BASE + 10 Attribute: READ Only Data Format: Byte Base +10 Base +11 DI15 Base +12 DI23 Base +13 DI31 3.3 Digital Output Register (BASE + 14) 32 digital output channels can be write and read-back from this register Address: BASE + 14 Attribute: READ/WRITE...
  • Page 28 u Digital Input Mode Setting: I_ACK: Input ACK Enable 1: Input ACK is enabled (input ACK will be asserted after input data is read by CPU or written to input FIFO) 0: Input ACK is disabled I_REQ: Input REQ Strobe Enabled 1: Use I_REQ edge to latch input data 0: I_REQ is disabled I_TIME0: Input Timer 0 Enable...

  • Page 29: Interrupt Status & Control Register (Base + 1C)

    O_TRG: Digital Output Trigger Signal This bit is used to control the O_TRG output of PCI-7200, the signal is on CN1 pin 36 of PCI-7200 or CN1 pin 26 of cPCI-7200 when 1: O_TRG 1 goes High (1) 0: O_TRG 1 goes Low (0)

  • Page 30: Interrupt Status

    T0_EN: Interrupt is triggered by timer 0 output. 1: Timer 0 interrupt is enabled 0: Timer 0 interrupt is disabled T1_EN: Interrupt is triggered by timer 1 output. 1: Timer 1 interrupt is enabled 0: Timer 1 interrupt is disabled T2_EN: Interrupt is triggered by timer 2 output.
  • Page 31 0: latch input data on rising edge of I_REQ u FIFO Control and Status (cPCI-7200 only): The cPCI-7200 has an extra 2K samples digital input FIFO. The FIFO can be cleared and monitored by the following bits: FIFORST (Write only): Clear the on-board DI FIFO 1: Write 1 to clear the data of the FIFO.

  • Page 32: 8254 Timer Registers (Base + 0)

    3.6 8254 Timer Registers (BASE + 0) The 8254 timer/ counter IC occupies 4 I/O address. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. You can download the 8254 data sheet from the following web site: http://support.intel.com/support/controllers/peripheral/231164.htm or...

  • Page 33: Chapter 4 Operation Theorem

    Operation Theorem In PCI-7200, there are four data transfer modes can be used for digital I/O access and control, these modes are: 1. Direct Program Control: the digital inputs and outputs can be read/written and controlled by its corresponding I/O port address directly. 2.

  • Page 34: Timer Pacer Mode

    4.2 Timer Pacer Mode The digital I/O access control is clocked by timer pacer, which is generated by an interval programming timer/counter chip 8254. There are three timers on the 8254. The timer 0 is used to generate timer pacer for digital input, and timer 1 is used for digital output.

  • Page 35: External Clock Mode

    The digital input is clocked by external strobe, which is from the Pin 19 (I_REQ) of CN2 (PCI-7200) or Pin 24 of CN1 (cPCI-7200). The operation sequence is very similar to Timer Pacer Trigger. The only difference is the clock source.
  • Page 36 IN_REQ IN_ACK PC's Main Memory O_REQ & O_ACK for Digital Output 1. Digital Output Data is moved from PC memory to FIFO o f PCI-7200 by using DMA data mastering data transfer. 2. Move output data from FIFO to digital output circuit. 3.

  • Page 37: Timing Characteristic

    4.5 Timing Characteristic 1. I_REQ as input data strobe (Rising Edge Active) IN_ I_REQ D10~DI31 60ns 2. I_REQ as input data strobe (Falling Edge Active) IN_R I_REQ D10~DI31 60ns valid data 60ns 5 PCI CLK Cycle 30ns valid data 60ns 5 PCI CLK Cycle 30ns valid data...
  • Page 38 3. I_REQ & I_ACK Handshaking IN I_REQ IN I_ACK D10~DI31 Note: I_REQ must be asserted until I_ACK asserts, I_ACK will be asserted until I_REQ de-asserts. 4. O_REQ as output data strobe Out O_REQ D00~D031 19ns 28 Operation Theorem valid data 60ns 1 PCI CLK Cycle valid data...
  • Page 39 5. O_REQ & O_ACK Handshaking O_REQ OUT_REQ OUT_ACK O_ACK DO0~Do31 19ns Note: O_ACK must be de-asserted before O_REQ asserts, O_ACK can be asserted any time after O_REQ asserts, O_REQ will be reasserted after O_ACK is asserted. valid data 1 PCI CLK Cycle valid data 5 PCI CLK Cycle Operation Theorem 29...

  • Page 40: Chapter 5 C/C++ Libraries

    C/C++ Libraries This chapter describes the software library for operating this card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The function prototypes and some useful constants are defined in the header files LIB directory (DOS) and INCLUDE directory (Windows 95).

  • Page 41: Programming Guide

    In DOS Environment : _{hardware_model}_{action_name}. e.g. _7200_Initial() . All functions in PCI-7200 driver are with 7200 as {hardware_model}. But they can be used by PCI-7200, cPCI-7200. In order to recognize the difference between DOS library and Windows 95 library, a capital "...

  • Page 42: 7200_Initial

    5.3 _7200_Initial @ Description A PCI-7200 card is initialized according to the card number. Because the PCI-7200 is PCI bus architecture and meets the plug and play design, the IRQ and base_address ( pass-through address) are assigned by system BIOS directly. Every PCI-7200 card has to be initialized by this function before calling other functions.

  • Page 43: 7200_Switch_Card_No

    @ Return Code ERR_NoError ERR_InvalidBoardNoInit 5.5 _7200_AUX_DI @ Description Read data from auxiliary digital input port of cPCI-7200 card. You can get all 4 bits input data by using this function. @ Syntax Visual C++ (Windows 95) int W_7200_AUX_DI (U32 *aux_di)

  • Page 44: 7200_Aux_Di_Channel

    5.6 _7200_AUX_DI_Channel @ Description Read data from auxiliary digital input channel of cPCI-7200 card. There are 4 digital input channels on the cPCI-7200 auxiliary digital input port. When performs this function, the auxiliary digital input port is read and the value of the corresponding channel is returned.

  • Page 45: 7200_Aux_Do_Channel

    @ Description Write data to auxiliary digital output channel (bit). There are 4 auxiliary digital output channels on the cPCI-7200. When performs this function, the digital output data is written to the corresponding channel. channel means each bit of digital input port...

  • Page 46: 7200_Di_Channel

    5.10 _7200_DI_Channel @ Description This function is used to read data from digital input channels (bit). There are 32 digital input channels on the PCI-7200. When performs this function, the digital input port is read and the value of the corresponding channel is returned.

  • Page 47: 7200_Do_Channel

    5.12 _7200_DO_Channel @ Description This function is used to write data to digital output channels (bit). There are 32 digital output channels on the PCI-7200. When performs this function, the digital output data is written to the corresponding channel. channel means each bit of digital input port @ Syntax Visual C++ (Windows 95) int W_7200_DO_Channel (U8 do_ch_no, Boolean do_data)

  • Page 48: 7200_Alloc_Dma_Mem

    5.13 _7200_Alloc_DMA_Mem @ Description Contact Windows 95/98 system to allocate a block of contiguous memory for single-buffered DMA transfer. This function is only available in Windows 95/98 version. @ Syntax Visual C++ (Windows 95) int W_7200_Alloc_DMA_Mem (U32 *buff, U32 *handle, U32 buf_size, U32 *actual_size) Visual Basic (Windows 95) W_7200_Alloc_DMA_Mem (buff As Long, handle As Long, ByVal...

  • Page 49: 7200_Free_Dma_Mem

    5.14 _7200_Free_DMA_Mem @ Description Release the system DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. @ Syntax Visual C++ (Windows 95) int W_7200_Free_DMA_Mem (U32 handle) Visual Basic (Windows 95) W_7200_Free_DMA_Mem (ByVal handle As Long ) As Long @ Argument handle: The handle of system DMA memory to release.

  • Page 50: 7200_Free_Dbdma_Mem

    the actual size of allocated memory for each half of circular buffer. @ Return Code ERR_NoError ERR_SmallerDMAMemAllocated 5.16 _7200_Free_DBDMA_Mem @ Description Release a system circular buffer DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. For double-buffered transfer principle, please refer to Section 6 “Double Buffered Mode Principle”.
  • Page 51 Bus Mastering DMA mode of PCI-7200 : PCI bus mastering offers the highest possible speed available on the PCI-7200. When the function _7200_DI_DMA_Start is executed, it will enable PCI bus master operation. This is conceptually similar to DMA (Direct Memory Access) transfers in a PC but is really PCI bus mastering.
  • Page 52 @ Syntax Visual C++ (Windows 95) int W_7200_DI_DMA_Start (U8 mode, U32 count, U32 handle, Boolean wait_trg, U8 trg_pol, Boolean clear_fifo, Boolean disable_di) Visual Basic (Windows 95) W_7200_DI_DMA_Start (ByVal mode As Byte, ByVal count As Long, ByVal handle As Long, ByVal wait_trg as Byte, ByVal trg_pol As Byte, ByVal clear_fifo As Byte, ByVal disable_di As Byte) As Long C/C++ (DOS)

  • Page 53: 7200_Di_Dma_Status

    clear_fifo : 0: retain the FIFO data 1: clear FIFO data before perform digital input disable_di : 0: digital input operation still active after DMA transfer complete 1: disable digital input operation immediately when DMA transfer complete @ Return Code ERR_NoError ERR_BoardNoInit ERR_InvalidDIOMode...

  • Page 54: 7200_Di_Dma_Stop

    5.19 _7200_DI_DMA_Stop @ Description This function is used to stop the DMA data transferring. After executing this function, the _7200_DI_DMA_Start function is stopped. returns the number of the data which has been transferred, no matter if the digital input DMA data transfer is stopped by this function or by the DMA terminal count ISR.

  • Page 55: 7200_Checkhalfready

    5.21 _7200_CheckHalfReady @ Description When you use _7200_DI_DMA_Start to sample digital input data and double buffer mode is set as enable. You must use _7200_CheckHalfReady to check data ready (data half full) or not in the circular buffer, and using _7200_DblBufferTransfer to get data.

  • Page 56: 7200_Getoverrunstatus

    5.23 _7200_GetOverrunStatus @ Description When you use _7200_DI_DMA_Start to convert Digital I/O data with double buffer mode enabled, and if you do not use _7200_DblBufferTransfer to move converted data then the double buffer overrun will occur, using this function to check overrun count. @ Syntax Visual C++ (Windows 95) int W_7200_GetOverrunStatus (U32 * overrunCount)

  • Page 57: 7200_Do_Dma_Status

    C/C++ (DOS) int _7200_DO_DMA_Start (U8 mode, U32 count, U32 *do_buffer, Boolean repeat) @ Argument mode : Digital output trigger modes DO_MODE_0 : Internal timer pacer (TIME 1) DO_MODE_1 : Internal timer pacer with O_REQ enable DO_MODE_2 : O_REQ & I_REQ handshaking count : the sample number of digital output data (in bytes!) handle (Win 95): the handle of system DMA memory.

  • Page 58: 7200_Do_Dma_Stop

    C/C++ (DOS) int _7200_DO_DMA_Status (U8 *status , U32 *count) @ Argument status : status of the DMA data transfer 0 : DO_DMA_STOP : DMA is completed 1 : DO_DMA_RUN : DMA is not completed count : the numbers of DO data which has been transferred. @ Return Code ERR_NoError 5.26 _7200_DO_DMA_Stop...

  • Page 59: 7200_Di_Timer

    5.27 _7200_DI_Timer @ Description This function is used to set the internal timer pacer for digital input. There are two configurations for the internal timer pacer : 1. Non-cascaded (One COUNTER 0 only) 4MHz Input Timer pacer frequency = 4Mhz / C0 2.

  • Page 60: 7200_Do_Timer

    Note : Since the Integer type in Visual Basic is signed integer. Its range is within -32768 and 32767. In Visual Basic, if you want to set c0 or c2 as value larger than 32767, please set it as the intended value minus 65536.
  • Page 61 @ Syntax Visual C++ (Windows 95) int W_7200_DO_Timer (U16 c1, U16 c2, Booelan mode) Visual Basic (Windows 95) W_7200_DO_Timer (ByVal c1 As Integer, ByVal c2 As Integer, ByVal mode As Byte) As Long C/C++ (DOS) int _7200_DO_Timer (U16 c1, U16 c2, Boolean mode) @ Argument c1 : frequency divider of Counter #1...

  • Page 62: Chapter 6 Double Buffer Mode Principle

    Double Buffer Mode Principle The data buffer for double-buffered DMA DI operation is a circular buffer logically. It logically divided into two equal halves. The double-buffered DI begins when device starts writing data into the first half of the circular buffer (Figure 6-1a).
  • Page 63 The PCI-7200 double buffer mode functions were designed according to the principle described above. If you use _7200_DblBufferMode() to enable double buffer mode, the following _7200_DI_DMA_Start() will perform double-buffered DMA DI. You can call _7200_CheckHalfReady() to check if data in the circular buffer is half-full and ready for copying to the transfer buffer. Then you can call _7200_DblBufferTransfer() to copy data from the ready half buffer to the transfer buffer.

  • Page 64: Chapter 7 Limitation

    Limitation The 12 MB/sec data transfer rate can only be possibly achieved in a system in which the PCI-7200 card is the only device using the bus, but the speed can not be guaranteed due to the limited FIFO depth. PCI-7200 supports three input clock modes, internal clock, external clock, and handshaking modes.

  • Page 65: Product Warranty/Service

    Product Warranty/Service Seller warrants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confirmed date of purchase of the original buyer and that upon written notice of any such defect, Seller will, at its option, repair or replace the defective item under the terms of this warranty, subject to the provisions and specific exclusions listed herein.

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