Table of Contents
Advertisement
26
After readout, the sensor returns to the reset state and the camera waits for a new trigger
pulse.
The data is output on the rising edge of the pixel clock. The signals FRAME_VALID
(FVAL) and LINE_VALID (LVAL) mask valid image information. The signal
INTEGRATION indicates the active integration phase of the sensor. The number of clock
pulses after exposure CPRE is defined by the calculation of the frame time.
Figure 17: Trigger Mode with External Exposure Control Timing Diagram
PCLK
EXSYNC
PRIN
INTEGRATION
Triggered Mode with External Edge Triggered
Exposure Control
In triggered mode with external edge exposure control, sensor control is reset with the
rising edge of an eternal trigger pulse, after which exposure of the image begins. The
integration ends with the rising edge of the external signal PRIN. The signals EXSYNC
and PRIN are clocked in the sensor control in such a way that the internal exposure
control becomes active one clock later.
The image is read out after the exposure time has elapsed. After readout, the sensor
returns to the reset state and the camera waits for a new trigger pulse.
The data is output on the rising edge of the pixel clock. The signals FRAME_VALID
(FVAL) and LINE_VALID (LVAL) mask valid image information. The signal
INTEGRATION indicates the active integration phase of the sensor. The number of clock
pulses after exposure CPRE is defined by the calculation of the frame time.
03-32-00525-03
PRELIMINARY
FVAL
LVAL
DATA
EXSYNC is ignored in mode constant image data rate
CPRE
Line Pause
First Line
1M28 and 1M75 User's Manual
Last Line
Line Pause
Line Pause
DALSA
Advertisement
Table of Contents
